hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 134

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

16.10. IMT Monitor Time Tag Count Low Register (0x003A)
16.11. IMT Monitor Time Tag Count Mid Register (0x003B)
16.12. IMT Monitor Time Tag Count High Register (0x003C)
The IMT Bus Monitor always uses a 48-bit time base. The current time base value is reflected in these three 16-bit
registers. These registers are read-only and are cleared after MR pin Master Reset. Count bits 47-32 reside in register
0x003C, count bits 31-16 reside in register 0x003B while register 0x003A contains bits 15-0.
The host cannot directly write into these registers, but can otherwise control the MT Time Tag count. By writing bits
15-14 in the Time Tag Counter Configuration Register 0x0039, the host can:
Finally, three IMT Time Tag Match Registers provide capability for generating a host interrupt when the time tag count
reaches any predetermined 48-bit value. For further information, refer to the description of the Time Tag Counter
Configuration Register 0x0039.
16.13. IMT Time Tag Utility Low Register (0x003D)
•
•
•
MSB
MSB
MSB
MSB
15 14 13 12 11 10
15 14 13 12 11 10
15 14 13 12 11 10
15 14 13 12 11 10
0
0
0
0
clear the 48-bit time tag count to zero (by loading three 0x0000 values)
simultaneously copy the 3-register time value into the three IMT Time Tag Utility Registers
simultaneously load the value contained in the three IMT Time Tag Utility Registers into the IMT Time Tag count
registers.
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register Value
Register Value
Register Value
Register Value
0
9
0
9
0
9
0
9
0
8
0
8
0
8
0
8
RW
R
R
R
7
7
7
7
0
0
0
0
0
6
0
6
0
6
0
6
0
0
0
0
5
5
5
5
4
4
4
4
0
0
0
0
0
3
0
3
0
3
0
3
HOLT INTEGRATED CIRCUITS
0
0
0
0
2
2
2
2
HI-6130, HI-6131
0
1
0
1
0
1
0
1
LSB
LSB
LSB
LSB
0
0
0
0
0
0
0
0
MR Reset
Host Access
Bit
MR Reset
Host Access
Bit
MR Reset
Host Access
Bit
MR Reset
Host Access
Bit
134