hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 181
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hi-6131pqtf
Manufacturer Part Number
hi-6131pqtf
Description
Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
Manufacturer
QuickLogic Corp
Datasheet
1.HI-6131PQTF.pdf
(271 pages)
- Current page: 181 of 271
- Download datasheet (6Mb)
Bit No. Mnemonic RW
7-4
1,0
3
2
-----
STOPP
PPEN
-----
Reset
0
0
0
0
Function
Not Used
Stop Ping-Pong Request.
The host asserts this bit to suspend ping-pong buffering for this mode code.
The host resets this bit to ask the device to re-enable ping-pong. The device
confirms recognition of ping-pong enable or disable status by writing PPON
bit 3.
Ping-Pong Buffer Enable.
The PPEN bit is initialized by the host to select buffer mode. If this bit is high,
ping-pong buffering is selected. If this bit is low, indexed single buffering is
selected.
After reset, the host initializes this bit to logic 1 to enable ping-pong buffering
for this mode code. The host asserts STOPP bit 3 to ask the device to tempo-
rarily disable ping-pong. Negating the STOPP bit asks the device to re-enable
ping-pong. The device confirms ping-pong enable or disable state changes
by writing the PPON bit.
Not Used.
HOLT INTEGRATED CIRCUITS
HI-6130, HI-6131
181
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