hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 149

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

18.7. Remote Terminal 1 (RT1) Current Message Information Word Register (0x001B)
These 16-bit registers are Read-Write and are fully maintained by the device. These registers are cleared after MR pin
master reset, but are unaffected by assertion of RTxRESET remote terminal software reset in the Master Status and
Reset Register (0x0001). This register contains the data buffer address (assigned in the terminal’s Descriptor Table)
corresponding to the last decoded valid command’ for the Remote Terminal. This register is updated 5µs after the
ACTIVE output is asserted.
The value in this register points to the command’s Message Information Word (or MIW) in the Descriptor Table, The
value of the current command word itself is stored in the Current Command Register for the Remote Terminal, RT1 or
RT2.
MSB
Bit No.
15 14 13 12 11 10
0
3
2
1
0
0
Remote Terminal 2 (RT2) Current Message Information Word Register (0x0024)
0
Mnemonic
BUSY
SSYSF
DBC
TF
0
0
0
Register Value
0
9
0
8
R/W
R/W
R/W
R/W
R
R
7
0
0
6
Reset
0
5
0
0
0
0
4
0
0
3
HOLT INTEGRATED CIRCUITS
Function
Busy status bit.
The host maintains this read-write bit. When set, the RT asserts its
Busy bit in status response for all valid commands. Instead of enabling
Busy for all commands, the host can assert Busy status for selected
commands by asserting the Busy bit in descriptor table Control Words
for the individual commands. When response to a command conveys
Busy status, the RT suppresses transmission of data words that would
normally accompany
status for transmit commands. For messages transacted with
Busy status, the WASBUSY flag is asserted in the stored Message
Information Word.
Subsystem Fail status bit.
The host maintains this read-write bit. This register bit is logically ORed
with the RT’s SSYSF input pin. If either SSYSF register bit or SSYSF
pin is asserted, the SSYSF Subsystem Flag status bit is set. If the RT’s
Configuration Register MCOPT1 bit equals 0, reception of a “transmit
vector word” mode command (MC16) causes automatic reset of the
SSYSF status bit in this register; when this occurs, the register bit is
reset before status word transmission begins.
Dynamic Bus Control status bit.
The host maintains this read-write bit.
Terminal Flag status bit.
The host maintains this read-write bit. When this bit is asserted, the
Terminal Flag status bit is set. If the Terminal Flag bit is set while
responding to subaddress transmit commands or mode code commands
16-31 that normally transmit a data word, all data word transmission is
suppressed.
0
2
HI-6130, HI-6131
0
1
LSB
0
0
MR Reset
Host Access
Bit
149