hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 117

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

empty packets).
14.6. IMT Block Status Word (BSW) Description
The IRIG-106 standard describes a Block Status Word stored within the Intra-Packet Data Header for each monitored
MIL-STD-1553 message. This word provides information regarding message status, the bus on which the message
occurred, whether errors occurred during the message, and the type of occurring errors. The IRIG-106 Chapter 10
compliant Block Status Word contains eight reserved bits, which the HI-613x IMT writes as logic 0:
The HI-613x IMT offers an Extended Status reporting option, enabled when bit 2 in register 0x0029 is logic 1. When
this option is enabled, all but one of the Reserved status bits are used to convey additional status information. Although
the extended status bits do not comply with the IRIG-106 Chapter 10 standard, the host can reset the 7 normally
reserved bits after reading the BSW. If using the IMT-generated 16-bit Data Checksum (enabled when register 0x0029
bits 1:0 equal 1-0), be advised that the tallied checksum value is based on the BSW value that was written into the
data packet by the device, at individual MIL-STD-1553 message completion. The Block Status Word with Extended
Status is defined:
15 14 13 12 11 10 9
15 14 13 12 11 10 9
Bit No.
0
0
15
14
13
0
0
0
0
Mnemonic
Reserved
Reserved
BID
0
0
(Not IRIG-106 Chapter 10 Compliant)
with Extended Status Bits Enabled
0
0
IMT Block Status Word
0
0
0
0
8
8
0
0
RW
RW
R/W
R/W
R/W
R/W
7
7
0
0
0
6
0
6
Reset
0
0
5
5
0
0
0
4
4
0
0
0
3
0
3
HOLT INTEGRATED CIRCUITS
Function
Bit 15 is not used in IMT mode, always reads logic 0.
Bit 14 is not used in IMT mode, always reads logic 0.
Bus ID (Bus B / Bus A).
Bit 13 indicates the bus ID for the message. This bit is logic 0 for a
message occurring on Bus A. This bit is logic 1 for a message occurring
on Bus B.
0
0
2
2
HI-6130, HI-6131
0
0
1
1
0
0
0
0
MR Reset
Host Access
MR Reset
Host Access
Bit
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