hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 256

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hi-6131pqtf

Manufacturer Part Number
hi-6131pqtf
Description
Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
Manufacturer
QuickLogic Corp
Datasheet
Circumstances for
Received Message
RESERVED MODE
CODES MC22 - MC31:
Mode code
commands
having mode codes
10110 through 11111
The mode code’s bit
in Illegalization Table
equals 1 **
(RT is using “illegal
command detection”)
OR
The mode code’s bit
in Illegalization Table
equals 0 *
(RT not using “illegal
command detection,”
respond “in form”)
MC22 - MC31
EXCEPTIONS:
Invalid command word.
T/R bit equals 0 and
mode code command
word is not followed by
a contiguous data word
(missing data word)
Terminal Response to
Received Command
The reserved mode code
commands do not have
defined actions.
Host must initialize device
to respond using either of
the two following methods:
Mode code is illegalized.
Set Message Error (ME)
status and transmit Status
Word. If T/R bit equals 1,
suppress data word
transmission.
OR
If T/R bit equals 1,
Reset Message Error (ME)
status. Transmit Status Word
with contiguous data word read
from assigned index or ping-
pong buffer (or from Descriptor
Word 4 if the SMCP option
applies.)
If T/R bit equals 0,
Reset Message Error (ME)
status and transmit Status. If
broadcast, also set BCR status
and suppress Status transmit.
Device stores received data
word in assigned index or ping-
pong buffer (or in Descriptor
Word 4 if SMCP Simplified
Mode Command Processing
applies).
No terminal response, the
message is ignored.
No Status Word change.
No Status Word transmit.
Set the Message Error
(ME) status bit.
If broadcast, set the
BCR status bit.
HOLT INTEGRATED CIRCUITS
HI-6130, HI-6131
256
Bits Updated
in Descriptor
Control Word
DBAC bit set.
BCAST bit reset.
DPB bit toggles.
DBAC bit set.
BCAST bit reset.
DPB bit toggles.
DBAC bit reset.
BCAST bit
updated.
DPB bit toggles.
No Change
DBAC bit set.
BCAST bit
updated.
DPB bit toggles.
Bits Updated in Data
Buffer Msg Info Word
ILCMD bit set.
MERR bit set.
BUSID bit updated.
RTRT bit reset.
(Other error bits reset.)
Normal CS update:
BUSID bit updated.
MERR bit reset.
ILCMD bit reset.
RTRT bit reset.
(All error bits reset.)
Normal CS update:
BUSID bit updated.
MERR bit reset.
ILCMD bit reset.
RTRT bit reset
(All error bits reset.)
No Message Info
Word is written
MERR bit set.
WCTERR bit set.
BUSID bit updated.
ILCMD, RTRT bits
reset.
(Other error bits reset.)
Interrupt
Options
ILCMD
IWA
IWA
IWA
IBR
None
MERR
IWA
IBR

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