hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 246

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

* Command is illegal but terminal is not using “illegal command detection” (in form response).
** Command is illegal and terminal is using “illegal command detection”
*** Undefined mode command rendered invalid by UMCINV option bit. Command’s bit in Illegalization Table is “don’t care”.
Circumstances for
Received Message
RESET REMOTE
TERMINAL (MC8):
Mode code command
with mode code
01000
and T/R bit equals 1
After Status transmission, the device automatically resets the status Message Error (ME) Busy and Broadcast
Command received (BCR) bits in its internal status register. The BIT Word at shared RAM address is reset to
0x0000. If either transmitter was shutdown, the shutdown condition is overridden. If the Terminal Flag (TF) status
bit was inhibited, the inhibit is reset.
This command does not reset any of the host-programmed registers that configure the terminal for operation. To
complete the terminal reset process, the host must assert either MR hardware master reset (with or without auto-
initialization) or assert the SRST bit in Configuration Register 1 to execute software reset. See following section
entitled Reset and Initialization for additional details. Because MC8 requires host interaction, most applications
will probably utilize the IWA interrupt to alert the host when received.
MC8 EXCEPTIONS:
Invalid command word.
OR
T/R bit equals 0 and
UMCINV bit in Config.
Register 1 equals 1 ***
T/R bit equals 0
AND
UMCINV bit in Config.
Register 1 equals 0.
The Illegalization Table
bit equals 0 *
T/R bit equals 0
AND
UMCINV bit in Config.
Register 1 equals 0.
The Illegalization Table
bit equals 1 **
Mode code command
word is followed by a
contiguous data word
Terminal Response to
Received Command
Default response: Reset
Message Error (ME)
status. If not broadcast,
transmit Status Word.
No terminal response,
the message is ignored.
No Status Word change.
(mode code is undefined
when T/R bit equals 0)
Respond “In form”: Reset
Message Error (ME) status.
If not broadcast, transmit
Status Word. If broadcast,
set the BCR status bit and
suppress status response.
Set Message Error (ME)
status. If not broadcast,
transmit Status Word.
If broadcast, also set
Status Word BCR bit and
suppress Status response.
No Status Word transmit.
Set the Message Error
(ME) status bit.
HOLT INTEGRATED CIRCUITS
HI-6130, HI-6131
246
Bits Updated
in Descriptor
Control Word
DBAC bit reset.
BCAST bit
updated.
DPB bit toggles.
No Change
DBAC bit set.
BCAST bit
updated.
DPB bit toggles.
DBAC bit set.
BCAST bit
updated.
DPB bit toggles.
DBAC bit set.
BCAST bit reset.
DPB bit toggles.
Bits Updated in Data
Buffer Msg Info Word
Normal CS update:
BUSID bit updated.
MERR bit reset.
ILCMD bit reset.
RTRT bit reset.
(All error bits reset.)
No Message Info
Word is written
Normal CS update:
BUSID bit updated.
MERR bit reset.
ILCMD bit reset.
RTRT bit reset.
(Other error bits reset.)
ILCMD bit set.
MERR bit set.
BUSID bit updated.
RTRT bit reset.
(Other error bits reset.)
MERR bit set.
GAPERR bit set.
BUSID bit updated.
ILCMD bit reset.
RTRT bit reset.
(Other error bits reset.)
Interrupt
Options
IWA
IBR
None
IWA
IBR
ILCMD
IWA
IBR
MERR
IWA