hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 252

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hi-6131pqtf

Manufacturer Part Number
hi-6131pqtf
Description
Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
Manufacturer
QuickLogic Corp
Datasheet
Circumstances for
Received Message
SELECTED
TRANSMITTER
SHUTDOWN (MC20):
Mode code command
with mode code
10100
and T/R bit equals 1
After Status Word transmission, the device stores received data word in the assigned index or ping-pong buffer
(or in Descriptor Word 4 if SMCP Simplified Mode Command Processing applies).
If the MCOPT4 bit in Configuration Register 2 equals 0, the received data word is compared to the value in the
Bus Select Register corresponding to the inactive bus. For example, if the command is received on Bus A, the
comparison uses the Bus B Select Register value. If the compared values match, the device automatically shuts
down either transmit and receive or transmit only for the inactive bus, depending on the state of the SDSEL bit
in Configuration Register 2. (See description of SDSEL and MCOPT4 bits in Configuration Register 2 for further
information. When a bus transmitter (or transmitter and receiver) is shut down by this mode command, bus status
is reflected by assertion of a TXASD or TXBSD bit in the Built-In Test Register at register address 0x0014. If
SDSEL equals logic 0, an RXASD or RXBSD bit will also be asserted. See Built-In Test Register description for
further information.
If MCOPT4 bit in Configuration Register 2 equals 1, the IWA interrupt is typically used to alert the host when an
MC20 command is received. The host must evaluate whether the received mode data word matches the bus
selection criteria. If bus selection criteria is met, the host fulfills bus shutdown command using one of two options:
1. set the bus shutdown bit INHBUSA or INHBUSB for the inactive bus in Configuration Register 1 to inhibit both
OR
2. assert the transmit shutdown input pin TXINHA or TXINHB for the inactive bus to inhibit only transmit. The
Once shutdown, the inactive bus transmitter (or transmitter and receiver) can only be reactivated by an “Override
Transmitter Shutdown” MC5 or MC21 or “Reset Remote Terminal” MC8 mode code command, or by software
reset (by setting the SRST bit in Configuration Register 1) or by hardware reset initiated by asserting the MR
master reset input pin.
MC20 EXCEPTIONS:
Invalid command word.
OR
T/R bit equals 0 and
UMCINV bit in Config.
Register 1 equals 1 ***
transmit and receive,
inactive bus receiver is still active and all valid commands are heeded without transmit. This option is rarely
applied.
Terminal Response to
Received Command
Default response: Reset
Message Error (ME)
status. and transmit
Status Word. If broadcast,
set BCR status bit and
suppress Status response.
This command is intended
for use in 1553 systems
with more than one dual
redundant bus.
No terminal response,
the message is ignored.
No Status Word change.
(mode code is undefined
when T/R bit equals 0)
HOLT INTEGRATED CIRCUITS
HI-6130, HI-6131
252
Bits Updated
in Descriptor
Control Word
DBAC bit reset.
BCAST bit reset.
DPB bit toggles.
No Change
Bits Updated in Data
Buffer Msg Info Word
Normal CS update:
BUSID bit updated.
MERR bit reset.
ILCMD bit reset.
RTRT bit reset.
(All error bits reset.)
No Message Info
Word is written
Interrupt
Options
IWA
None

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