hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 198

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

Increasing
Figure 21. Indexed Buffer Mode Example for a Receive Subaddress (broadcast disabled)
Memory
Address
Messages #2, #3, etc
Receive 4 Words
Receive 3 Words
Messages #1
Receive Subaddress
B’cast Data Pointer
INDX Index Count
Descriptor Block
Msg Info Word 1
Msg Info Word 1
Time-Tag Word 1
Time-Tag Word 1
Data Pointer A
Control Word
Data Word 4
Data Word 3
Data Word 2
Data Word 1
Data Word 3
Data Word 2
Data Word 1
Subaddress
Assigned
Receive
Buffer
for a
HOLT INTEGRATED CIRCUITS
HI-6130, HI-6131
198
0x050A
0x0509
0x0508
0x0507
0x0506
0x0505
0x0504
0x0503
0x0502
0x0501
0x0500
RAM
Address
Broadcast Data Pointer = 0xXXXX Don’t Care
Index = 0x0002 Initialize index for 2 messages
Data Pointer A = 0x0500 Buffer Start Address in RAM
Control Word = 0x8000 Index Mode, IXEQZ Interrupt
Initialized Descriptor Values
For Message #2,
Index decrements to zero.
Data Pointer A = 0x0505 (static)
IXEQZ Interrupt is generated
For Message #3 and beyond,
the data buffer is overwritten.
Index remains zero (static)
Data Pointer A = 0x0505 (static)
and no IXEQZ interrupt occurs.
Index decrements to one
Data Pointer A = 0x0505
Index equals two