hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 241
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hi-6131pqtf
Manufacturer Part Number
hi-6131pqtf
Description
Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
Manufacturer
QuickLogic Corp
Datasheet
1.HI-6131PQTF.pdf
(271 pages)
- Current page: 241 of 271
- Download datasheet (6Mb)
* Command is illegal but terminal is not using “illegal command detection” (in form response).
** Command is illegal and terminal is using “illegal command detection”
*** Undefined mode command rendered invalid by UMCINV option bit. Command’s bit in Illegalization Table is “don’t care”.
Circumstances for
Received Message
INITIATE
SELF TEST (MC3):
Mode code command
with mode code
00011
and T/R bit equals 1
MC3 EXCEPTIONS:
Invalid command word.
OR
T/R bit equals 0 and
UMCINV bit in Config.
Register 1 equals 1 ***
T/R bit equals 0
AND
UMCINV bit in Config.
Register 1 equals 0.
The Illegalization Table
bit equals 0 *
T/R bit equals 0
AND
UMCINV bit in Config.
Register 1 equals 0.
The Illegalization Table
bit equals 1 **
Mode code command
word is followed by a
contiguous data word
Terminal Response to
Received Command
Default response: Reset
Message Error (ME) status
then transmit Status Word.
If broadcast, set the
Status Word BCR bit and
suppress status transmit.
Host should initiate self-
test then update Built-In
Test word at shared RAM
address 0x0093. Resume
terminal execution.
No terminal response,
the message is ignored.
No Status Word change.
(mode code is undefined
when T/R bit equals 0)
Respond “In form”: Reset
Message Error (ME) status.
If not broadcast, transmit
Status Word. If broadcast,
set the BCR status bit and
suppress status response.
Set Message Error (ME)
status. If not broadcast,
transmit Status Word.
If broadcast, also set
Status Word BCR bit and
suppress Status response.
No Status Word transmit.
Set the Message Error
(ME) status bit.
HOLT INTEGRATED CIRCUITS
HI-6130, HI-6131
241
Bits Updated
in Descriptor
Control Word
DBAC bit reset.
BCAST bit
updated.
DPB bit toggles.
No Change
DBAC bit set.
BCAST bit
updated.
DPB bit toggles.
DBAC bit set.
BCAST bit
updated.
DPB bit toggles.
DBAC bit set.
BCAST bit reset.
DPB bit toggles.
Bits Updated in Data
Buffer Msg Info Word
Normal CS update:
BUSID bit updated.
MERR bit reset.
ILCMD bit reset.
RTRT bit reset.
(All error bits reset.)
No Message Info
Word is written
Normal CS update:
BUSID bit updated.
MERR bit reset.
ILCMD bit reset.
RTRT bit reset.
(Other error bits reset.)
ILCMD bit set.
MERR bit set.
BUSID bit updated.
RTRT bit reset.
(Other error bits reset.)
MERR bit set.
WCTERR bit set.
BUSID bit updated.
ILCMD bit reset.
RTRT bit reset.
(Other error bits reset.)
Interrupt
Options
IWA
IBR
None
IWA
IBR
ILCMD
IWA
IBR
MERR
IWA
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