AT91SAM9M10-CU Atmel, AT91SAM9M10-CU Datasheet - Page 134

• Manufacturer Part Number: AT91SAM9M10-CU
• Description: IC MCU 16/32BIT ARM9 324TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9M10-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 133 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 2 x 16 bit
• Operating Supply Voltage: 1.65 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9M10-G45-EK
• Controller Family/series: AT91
• No. Of I/o's: 160
• Ram Memory Size: 64KB
• Cpu Speed: 400MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Cpu Family: AT91
• Device Core: ARM926EJ-S
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 64KB
• # I/os (max): 160
• Number Of Timers - General Purpose: 7
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Operating Supply Voltage (max): 1.1/1.95/3.6V
• Operating Supply Voltage (min): 0.9/1.65/1.8/3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Package Type: TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 19-3.
Table 19-4.
19.3
134
5
6
7
1
2
3
4
5
6
7
0
Internal Periph.
Internal SRAM 0
Memory Mapping
DDR Port 3
Master
Internal Periph.
Slave
LCD User Int.
UDPHS RAM
Internal ROM
AT91SAM9M10
DDR Port 0
DDR Port 1
DDR Port 2
DDR Port 3
UHP OHCI
UHP EHCI
EBI
VDEC
EBI
AT91SAM9M10 Masters to Slaves Access with VDEC_SEL = 0 (Continued)
AT91SAM9M10 Masters to Slaves Access with VDEC_SEL = 1 (default)
ARM
Instr.
X
X
-
926
.
Table 19-5
the Remap status (RCBx bit in Bus Matrix Master Remap Control Register MATRIX_MRCR) and
the BMS state at reset.
Table 19-5.
The Bus Matrix provides one decoder for every AHB master interface. The decoder offers each
AHB master several memory mappings. In fact, depending on the product, each memory area
may be assigned to several slaves. Booting at the same address while using different AHB
slaves (i.e. external RAM, internal ROM or internal Flash, etc.) becomes possible.
The Bus Matrix user interface provides Master Remap Control Register (MATRIX_MRCR) that
performs remap action for every master independently.
0
X
X
X
X
X
X
X
X
X
X
-
-
-
Base Address
0x0000 0000
Slave
X
X
ARM
Data
-
926
1
X
X
X
X
X
X
X
X
X
X
-
-
-
summarizes the Slave Memory Mapping for each connected Master, depending on
Internal Memory Mapping
X
X
X
PDC
2
X
X
X
X
X
X
-
-
-
-
-
-
-
HOST
Internal ROM
OHCI
X
X
-
USB
BMS = 1
3
X
X
X
X
-
-
-
-
-
-
-
-
-
4 & 5
DMA
X
X
X
X
X
X
X
X
-
-
-
-
-
-
-
-
RCBx = 0
DMA
X
X
-
ISI
6
X
X
X
X
-
-
-
-
-
-
-
-
-
EBI NCS0
BMS
Master
DMA
LCD
X
X
-
7
X
X
-
-
-
-
-
-
-
-
-
-
-
= 0
et MAC
Ethern
X
X
-
8
X
X
X
X
-
-
-
-
-
-
-
-
-
Internal SRAM
Device
USB
RCBx = 1
HS
X
X
-
9
X
X
X
X
X
-
-
-
-
-
-
-
-
6355B–ATARM–21-Jun-10
EHCI
USB
Host
10
X
X
-
X
X
X
X
-
-
-
-
-
-
-
-
-
VDEC
X
11
-
-
X
X
-
-
-
-
-
-
-
-
-
-
-