AT91SAM9M10-CU Atmel, AT91SAM9M10-CU Datasheet - Page 560

IC MCU 16/32BIT ARM9 324TFBGA

AT91SAM9M10-CU

Manufacturer Part Number
AT91SAM9M10-CU
Description
IC MCU 16/32BIT ARM9 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9M10-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
133 MHz
Number Of Programmable I/os
5
Number Of Timers
2 x 16 bit
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9M10-G45-EK
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
Cpu Family
AT91
Device Core
ARM926EJ-S
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
64KB
# I/os (max)
160
Number Of Timers - General Purpose
7
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Operating Supply Voltage (max)
1.1/1.95/3.6V
Operating Supply Voltage (min)
0.9/1.65/1.8/3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Quantity
Price
Part Number:
AT91SAM9M10-CU
Manufacturer:
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Quantity:
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Part Number:
AT91SAM9M10-CU
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Quantity:
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6355B–ATARM–21-Jun-10
In SPI Slave Mode:
• the external clock SCK must not be selected (USCLKS
• to obtain correct behavior of the receiver and the transmitter, the value programmed in CD of
• if the internal clock divided (MCK/DIV) is selected, the value programmed in CD must be
• the external clock (SCK) selection is forced regardless of the value of the USCLKS field in the
• to obtain correct behavior of the receiver and the transmitter, the external clock (SCK)
to “1” in the Mode Register (US_MR), in order to generate correctly the serial clock on the
SCK pin.
must be superior or equal to 4.
even to ensure a 50:50 mark/space ratio on the SCK pin, this value can be odd if the internal
clock is selected (MCK).
Mode Register (US_MR). Likewise, the value written in US_BRGR has no effect, because
the clock is provided directly by the signal on the USART SCK pin.
frequency must be at least 4 times lower than the system clock.
0x3), and the bit CLKO must be set
AT91SAM9M10
560

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