AT91SAM9M10-CU Atmel, AT91SAM9M10-CU Datasheet - Page 946
![IC MCU 16/32BIT ARM9 324TFBGA](/photos/12/13/121367/324-tfbga-pkg_sml.jpg)
AT91SAM9M10-CU
Manufacturer Part Number
AT91SAM9M10-CU
Description
IC MCU 16/32BIT ARM9 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM9M10-CU
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
133 MHz
Number Of Programmable I/os
5
Number Of Timers
2 x 16 bit
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9M10-G45-EK
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
Cpu Family
AT91
Device Core
ARM926EJ-S
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
64KB
# I/os (max)
160
Number Of Timers - General Purpose
7
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Operating Supply Voltage (max)
1.1/1.95/3.6V
Operating Supply Voltage (min)
0.9/1.65/1.8/3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM9M10-CU
Manufacturer:
Atmel
Quantity:
996
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6355B–ATARM–21-Jun-10
• For Trigger Counter at 1:
1. Close the switches on the inputs X
2. Convert Channel X
3. If Channel 4 to Channel 7 are enabled, convert Channels and store result in the corre-
4. Set Trigger Counter to 2.
• For Trigger Counter at 2:
1. Close the switches on the inputs X
2. Convert Channel Y
3. If Channel 4 to Channel 7 are enabled, convert Channels and store result in the corre-
4. Set Trigger Counter to 3.
• For Trigger Counter at 3:
1. Close the switches on the inputs Y
2. Convert Channel Y
3. If Channel 4 to Channel 7 are enabled, convert Channels and store result in the corre-
4. Set Trigger Counter to 4.
• For Trigger Counter at 4:
1. Close the switches on the inputs Y
2. Convert Channel Y
3. If Channel 4 to Channel 7 are enabled, convert Channels and store result in the corre-
4. Set Trigger Counter to 5.
• For Trigger Counter at 5:
1. Close the switches on the inputs Y
2. Convert Channel X
3. If Channel 4 to Channel 7 are enabled, convert Channels and store result in the corre-
4. Set Trigger Counter to 6.
• For Trigger Counter between 6 and (2
1. Increment Trigger Counter.
2. If Trigger Counter equals (2
result in TSADCC_CDR0 (and also in TSADCC_LCDR if PDCEN is enabled).
sponding TSADCC_CDRx and TSADCC_LCDR.
tion result in TSADCC_CDR1 (and also in TSADCC_LCDR if PDCEN is enabled).
sponding TSADCC_CDRx and TSADCC_LCDR.
sponding TSADCC_CDRx and TSADCC_LCDR.
result in TSADCC_CDR2 (and also in TSADCC_LCDR if PDCEN is enabled).
sponding TSADCC_CDRx and TSADCC_LCDR.
result in TSADCC_CDR3 (and also in TSADCC_LCDR if PDCEN is enabled).
sponding TSADCC_CDRx and TSADCC_LCDR.
P
P
P
P
M
, subtract TSADCC_CDR1 from the result and store the subtraction
, subtract TSADCC_CDR3 from the result and store the subtraction
, subtract TSADCC_CDR3 from the result and store the subtraction
,, subtract TSADCC_CDR1 from the result and store the subtrac-
and store the result in TSADCC_CDR3.
TSFREQ+1
P
P
P
P
P
TSFREQ+1
), then set Trigger Counter to 0.
and Y
and Y
and Y
and X
and X
M
M
M
M
M
):
during the Sample and Hold Time.
during the Sample and Hold Time.
during the Sample and Hold Time
during the Sample and Hold Time.
during the Sample and Hold Time.
AT91SAM9M10
946
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