AT91SAM9M10-CU Atmel, AT91SAM9M10-CU Datasheet - Page 547
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AT91SAM9M10-CU
Manufacturer Part Number
AT91SAM9M10-CU
Description
IC MCU 16/32BIT ARM9 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM9M10-CU
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
133 MHz
Number Of Programmable I/os
5
Number Of Timers
2 x 16 bit
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9M10-G45-EK
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
Cpu Family
AT91
Device Core
ARM926EJ-S
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
64KB
# I/os (max)
160
Number Of Timers - General Purpose
7
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Operating Supply Voltage (max)
1.1/1.95/3.6V
Operating Supply Voltage (min)
0.9/1.65/1.8/3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM9M10-CU
Manufacturer:
Atmel
Quantity:
996
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Figure 32-22. Parity Error
32.7.3.10
32.7.3.11
6355B–ATARM–21-Jun-10
Multidrop Mode
Transmitter Timeguard
Baud Rate
If the PAR field in the Mode Register (US_MR) is programmed to the value 0x6 or 0x07, the
USART runs in Multidrop Mode. This mode differentiates the data characters and the address
characters. Data is transmitted with the parity bit at 0 and addresses are transmitted with the
parity bit at 1.
If the USART is configured in multidrop mode, the receiver sets the PARE parity error bit when
the parity bit is high and the transmitter is able to send a character with the parity bit high when
the Control Register is written with the SENDA bit at 1.
To handle parity error, the PARE bit is cleared when the Control Register is written with the bit
RSTSTA at 1.
The transmitter sends an address byte (parity bit set) when SENDA is written to US_CR. In this
case, the next byte written to US_THR is transmitted as an address. Any character written in
US_THR without having written the command SENDA is transmitted normally with the parity at
0.
The timeguard feature enables the USART interface with slow remote devices.
The timeguard function enables the transmitter to insert an idle state on the TXD line between
two characters. This idle state actually acts as a long stop bit.
The duration of the idle state is programmed in the TG field of the Transmitter Timeguard Regis-
ter (US_TTGR). When this field is programmed at zero no timeguard is generated. Otherwise,
the transmitter holds a high level on TXD after each transmitted byte during the number of bit
periods programmed in TG in addition to the number of stop bits.
As illustrated in
the programming of a timeguard. TXRDY rises only when the start bit of the next character is
sent, and thus remains at 0 during the timeguard transmission if a character has been written in
US_THR. TXEMPTY remains low until the timeguard transmission is completed as the time-
guard is part of the current character being transmitted.
RXRDY
US_CR
PARE
Clock
Write
RXD
Start
Bit
D0
Figure
D1
D2
32-23, the behavior of TXRDY and TXEMPTY status bits is modified by
D3
D4
D5
D6
D7
Parity
Bad
Bit
Stop
Bit
RSTSTA = 1
AT91SAM9M10
547
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