AT91SAM9M10-CU Atmel, AT91SAM9M10-CU Datasheet - Page 57

IC MCU 16/32BIT ARM9 324TFBGA

AT91SAM9M10-CU

Manufacturer Part Number
AT91SAM9M10-CU
Description
IC MCU 16/32BIT ARM9 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9M10-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
133 MHz
Number Of Programmable I/os
5
Number Of Timers
2 x 16 bit
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9M10-G45-EK
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
Cpu Family
AT91
Device Core
ARM926EJ-S
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
64KB
# I/os (max)
160
Number Of Timers - General Purpose
7
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Operating Supply Voltage (max)
1.1/1.95/3.6V
Operating Supply Voltage (min)
0.9/1.65/1.8/3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Part Number:
AT91SAM9M10-CU
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11. Boot Strategies
11.1
6355B–ATARM–21-Jun-10
Boot Program
The system always boots at address 0x0. To ensure maximum boot possibilities the memory
layout can be changed with two parameters.
Note: All the memory blocks can always be seen at their specified base addresses that are not
concerned by these parameters.
The AT91SAM9M10 manages a boot memory that depends on the level on the BMS pin at
reset. The internal memory area mapped between address 0x0 and 0x000F FFFF is reserved to
this effect.
If BMS is detected at 0, the boot memory is the memory connected on the Chip Select 0 of the
External Bus Interface.
For optimization purpose, nothing else is done. To speed up the boot sequence user pro-
grammed software should perform a complete configuration:
If BMS is detected at 1, the boot memory is the embedded ROM and the boot program
described below is executed.
The Boot Program is contained in the embedded ROM. It is also called: “Rom Code” or “First
level bootloader”. At power on, if the BMS pin is detected at 1, the boot memory is the embed-
ded ROM and the Boot Program is executed.
The Boot Program consists of several steps. First, it performs device initialization. Then it
attempts to boot from external non volatile memories (NVM). And finally, if no valid program is
found in NVM, it executes a monitor called SAM-BA
• REMAP allows the user to layout the internal SRAM bank to 0x0 to ease the development.
• BMS allows the user to layout to 0x0, when convenient, the ROM or an external memory. This
• Boot on on-chip RC
• Boot with the default configuration for the Static Memory Controller, byte select mode, 16-bit
• Enable the 32768 Hz oscillator if best accuracy is needed
• Program the PMC (main oscillator enable or bypass mode)
• Program and Start the PLL
• Reprogram the SMC setup, cycle, hold, mode timings registers for EBI CS0 to adapt them to
• Switch the system clock to the new value
This is done by software once the system has boot.
is done by hardware at reset.
data bus, Read/Write controlled by Chip Select, allows boot on 16-bit non-volatile memory.
the new clock
®
Monitor.
AT91SAM9M10
57

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