AT91SAM9M10-CU Atmel, AT91SAM9M10-CU Datasheet - Page 731

• Manufacturer Part Number: AT91SAM9M10-CU
• Description: IC MCU 16/32BIT ARM9 324TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9M10-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 133 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 2 x 16 bit
• Operating Supply Voltage: 1.65 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9M10-G45-EK
• Controller Family/series: AT91
• No. Of I/o's: 160
• Ram Memory Size: 64KB
• Cpu Speed: 400MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Cpu Family: AT91
• Device Core: ARM926EJ-S
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 64KB
• # I/os (max): 160
• Number Of Timers - General Purpose: 7
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Operating Supply Voltage (max): 1.1/1.95/3.6V
• Operating Supply Voltage (min): 0.9/1.65/1.8/3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Package Type: TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

35.11.1
35.11.2
6355B–ATARM–21-Jun-10
Boot Procedure, Processor Mode
Boot Procedure, DMA Mode
1. Configure the HSMCI data bus width programming SDCBUS Field in the
2. Set the byte count to 512 bytes and the block count to the desired number of blocks,
3. Issue the Boot Operation Request command by writing to the HSMCI_CMDR register
4. The BOOT_ACK field located in the HSMCI_CMDR register must be set to one, if the
5. Host processor can copy boot data sequentially as soon as the RXRDY flag is
6. When Data transfer is completed, host processor shall terminate the boot stream by
1. Configure the HSMCI data bus width by programming SDCBUS Field in the
2. Set the byte count to 512 bytes and the block count to the desired number of blocks by
3. Enable DMA transfer in the HSMCI_DMA register.
4. Configure DMA controller, program the total amount of data to be transferred and
5. Issue the Boot Operation Request command by writing to the HSMCI_CMDR register
6. DMA controller copies the boot partition to the memory.
7. When DMA transfer is completed, host processor shall terminate the boot stream by
HSMCI_SDCR register. The BOOT_BUS_WIDTH field located in the device Extended
CSD register must be set accordingly.
writing BLKLEN and BCNT fields of the HSMCI_BLKR Register.
with SPCMD field set to BOOTREQ, TRDIR set to READ and TRCMD set to “start data
transfer”.
BOOT_ACK field of the MMC device located in the Extended CSD register is set to one.
asserted.
writing the HSMCI_CMDR register with SPCMD field set to BOOTEND.
HSMCI_SDCR register. The BOOT_BUS_WIDTH field in the device Extended CSD
register must be set accordingly.
writing BLKLEN and BCNT fields of the HSMCI_BLKR Register.
enable the relevant channel.
with SPCND set to BOOTREQ, TRDIR set to READ and TRCMD set to “start data
transfer”.
writing the HSMCI_CMDR register with SPCMD field set to BOOTEND.
AT91SAM9M10
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