AT91SAM9M10-CU Atmel, AT91SAM9M10-CU Datasheet - Page 683

IC MCU 16/32BIT ARM9 324TFBGA

AT91SAM9M10-CU

Manufacturer Part Number
AT91SAM9M10-CU
Description
IC MCU 16/32BIT ARM9 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9M10-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
133 MHz
Number Of Programmable I/os
5
Number Of Timers
2 x 16 bit
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9M10-G45-EK
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
Cpu Family
AT91
Device Core
ARM926EJ-S
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
64KB
# I/os (max)
160
Number Of Timers - General Purpose
7
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Operating Supply Voltage (max)
1.1/1.95/3.6V
Operating Supply Voltage (min)
0.9/1.65/1.8/3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM9M10-CU
Manufacturer:
Atmel
Quantity:
996
Part Number:
AT91SAM9M10-CU
Manufacturer:
Atmel
Quantity:
10 000
34.9.3
Name:
Addresses:
Access:
• CKS: Receive Clock Selection
• CKO: Receive Clock Output Mode Selection
• CKI: Receive Clock Inversion
0 = The data inputs (Data and Frame Sync signals) are sampled on Receive Clock falling edge. The Frame Sync signal
output is shifted out on Receive Clock rising edge.
1 = The data inputs (Data and Frame Sync signals) are sampled on Receive Clock rising edge. The Frame Sync signal out-
put is shifted out on Receive Clock falling edge.
CKI affects only the Receive Clock and not the output clock signal.
6355B–ATARM–21-Jun-10
0x3-0x7
31
23
15
7
CKO
CKS
0x0
0x1
0x2
0x0
0x1
0x2
0x3
SSC Receive Clock Mode Register
CKG
Receive Clock Output Mode
None
Continuous Receive Clock
Receive Clock only during data transfers
Reserved
Selected Receive Clock
Divided Clock
TK Clock signal
RK pin
Reserved
30
22
14
SSC_RCMR
0xFFF9C010 (0), 0xFFFA0010 (1)
Read-write
6
CKI
29
21
13
5
STOP
28
20
12
4
PERIOD
STTDLY
CKO
27
19
11
3
26
18
10
2
START
AT91SAM9M10
25
17
9
1
Input-only
CKS
RK pin
Output
Output
24
16
8
0
683

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