DF2239TF16I Renesas Electronics America, DF2239TF16I Datasheet - Page 346

• Manufacturer Part Number: DF2239TF16I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2239TF16I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2239TF16I; HD64F2239TF16I

Section 9 Data Transfer Controller (DTC)
Legend: ×: Don’t care
9.2.2
MRB is an 8-bit register that selects the DTC operating mode.
Rev. 6.00 Mar. 18, 2010 Page 284 of 982
REJ09B0054-0600
Bit
0
Bit
7
6
5 to
0
Bit Name
Sz
Bit Name
CHNE
DISEL
⎯
DTC Mode Register B (MRB)
Initial Value
Undefined
Undefined
Undefined
Initial Value
Undefined
R/W
⎯
⎯
⎯
⎯
R/W
Description
DTC Chain Transfer Enable
This bit specifies a chain transfer. For details, refer
to section 9.5.4, Chain Transfer.
In data transfer with CHNE set to 1, determination of
the end of the specified number of transfers,
clearing of the interrupt source flag, and clearing of
DTCER, are not performed.
0: DTC data transfer completed (waiting for start)
1: DTC chain transfer (reads new register
DTC Interrupt Select
This bit specifies whether CPU interrupt is disabled
or enabled after a data transfer.
0: Interrupt request is issued to the CPU when the
1: DTC issues interrupt request to the CPU in every
Reserved
These bits have no effect on DTC operation. The
write value should always be 0.
Description
DTC Data Transfer Size
Specifies the size of data to be transferred.
0: Byte-size transfer
1: Word-size transfer
information and transfers data)
specified data transfer is completed
data transfer (DTC does not clear the interrupt
request flag that is a cause of the activation)