DF2239TF16I Renesas Electronics America, DF2239TF16I Datasheet - Page 609

MCU 3V 384K I-TEMP 100-TQFP

DF2239TF16I

Manufacturer Part Number
DF2239TF16I
Description
MCU 3V 384K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of DF2239TF16I

Core Processor
H8S/2000
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2239TF16I
HD64F2239TF16I
This LSI has independent serial communication interfaces (SCIs). The SCI can handle both
asynchronous and clocked synchronous serial communication. Serial data communication can be
carried out using standard asynchronous communication chips such as a Universal Asynchronous
Receiver/Transmitter (UART) or an Asynchronous Communication Interface Adapter (ACIA). A
function is also provided for serial communication between processors (multiprocessor
communication function). The SCI also supports an IC card (Smart Card) interface conforming to
ISO/IEC 7816-3 (Identification Card) as a serial communication interface extended function.
15.1
• The number of on-chip channels
• Choice of asynchronous or clocked synchronous serial communication mode
• Full-duplex communication capability
• On-chip baud rate generator allows any bit rate to be selected
• Choice of LSB-first or MSB-first transfer (except in the case of asynchronous mode 7-bit data)
• Four interrupt sources
• Module stop mode can be set
Asynchronous mode
• Data length: 7 or 8 bits
• Stop bit length: 1 or 2 bits
H8S/2258 Group, H8S/2239 Group, H8S/2238 Group, and H8S/2237 Group: Four channels
(channels 0, 1, 2, and 3)
H8S/2227 Group: Three channels (channels 0, 1, and 3)
The transmitter and receiver are mutually independent, enabling transmission and reception to
be executed simultaneously.
Double-buffering is used in both the transmitter and the receiver, enabling continuous
transmission and continuous reception of serial data.
External clock can be selected as a transfer clock source (except for in Smart Card interface
mode).
Transmit-end, transmit-data-empty, receive-data-full, and receive error — that can issue
requests.
The transmit-data-empty interrupt and receive data full interrupts can be used to activate the
data transfer controller (DTC) or the direct memory access controller (DMAC) (H8S/2239
Group only).
Section 15 Serial Communication Interface (SCI)
Features
Section 15 Serial Communication Interface (SCI)
Rev. 6.00 Mar. 18, 2010 Page 547 of 982
REJ09B0054-0600

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