DF2239TF16I Renesas Electronics America, DF2239TF16I Datasheet - Page 803

MCU 3V 384K I-TEMP 100-TQFP

DF2239TF16I

Manufacturer Part Number
DF2239TF16I
Description
MCU 3V 384K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of DF2239TF16I

Core Processor
H8S/2000
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2239TF16I
HD64F2239TF16I
Notes:
1. Pre-writing (all erase block data are cleared to 0) is not necessary.
2. Verify data is read out in 16 bit size (word access).
3. Erasing block register (EBR) can be set about 1 bit at a time.
4. Erasing is performed block by block. When multiple blocks must be erased,
5. This is a recommended value. To change it, consult tables 27.12, 27.25, 27.37, 27.49, and 27.59 and select
Increment address
Do not specify 2 bits or more.
erase each lock one by one.
a new value such that the erase time (tE), wait time after E1 bit setting (tse), and maximum erase count (N)
do not exceed the maximum values indicated.
Figure 20.12 Erase/Erase-Verify Flowchart
No
No
Set block start address as verify address
H'FF dummy write to verify address
SWE1 bit in FLMCR1 ← 1
SWE1 bit in FLMCR1 ← 0
ESU1 bit in FLMCR1 ← 1
ESU1 bit in FLMCR1 ← 0
All erase block erased?
EV1 bit in FLMCR ← 1
Last address of block?
EV1 bit in FLMCR ← 0
E1 bit in FLMCR1 ← 1
E1 bit in FLMCR1 ← 0
*
tsswe: Wait 100 μs
tcswe: Wait 100 μs
Verify data = all 1?
4
tcesu: Wait 10 μs
tsswe: Wait 1 μs
Read verify data
tsev: Wait 20 μs
tse: Wait 10 ms
tsevr: Wait 2 μs
tce: Wait 10 μs
tcer: Wait 4 μs
End of erasing
Set EBR1 (2)
Disable WDT
Enable WDT
Erase start
n = 1
Yes
Yes
Yes
*
1
Section 20 Flash Memory (F-ZTAT Version)
No
Rev. 6.00 Mar. 18, 2010 Page 741 of 982
*
*
*
3
5
2
SWE1 bit in FLMCR1 ← 0
EV1 bit in FLMCR ← 0
start erasing
stop erasing
tcswe: Wait 100 μs
tcer: Wait 4 μs
Erase failure
n ≥ 100? *
Erasing should be
done to a block
Yes
5
No
n ← n + 1
REJ09B0054-0600

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