sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 114

• Manufacturer Part Number: sc9s12hy64j0vllr
• Description: S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
• Manufacturer: Freescale Semiconductor, Inc

1
1
Port Integration Module (S12HYPIMV1)
2.3.69
2.3.70
114
Address 0x028C
Address 0x028D
PIE1AD
Read: Anytime.
Write: Anytime.
Read: Anytime.
Write: Anytime.
Read: Anytime.
Field
Field
PIFS
Reset
Reset
6-5
7-0
W
W
R
R
PIE1AD7
Port S interrupt flag—
Each flag is set by an active edge on the associated input pin. This could be a rising or a falling edge based on the
state of the PPSS register. To clear this flag, write logic level 1 to the corresponding bit in the PIFS register. Writing
a 0 has no effect.
1 Active edge on the associated bit has occurred (an interrupt will occur if the associated enable bit is set).
0 No active edge pending.
Port AD interrupt enable—
This register disables or enables on a per-pin basis the edge sensitive external interrupt associated with Port AD.
1 Interrupt is enabled.
0 Interrupt is disabled (interrupt flag masked).
PIF1AD7
Port AD Interrupt Enable Register (PIE1AD)
Port AD Interrupt Flag Register (PIF1AD)
0
0
7
7
PIE1AD6
PIF1AD6
Figure 2-67. Port AD Interrupt Enable Register (PIE1AD)
0
0
6
6
Figure 2-68. Port AD Interrupt Flag Register (PIF1AD)
Table 2-58. PIE1AD Register Field Descriptions
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 2-57. PIFS Register Field Descriptions
PIE1AD5
PIF1AD5
0
0
5
5
PIE1AD4
PIF1AD4
0
0
4
4
Description
Description
PIE1AD3
PIF1AD3
3
0
3
0
PIE1AD2
PIF1AD2
0
0
2
2
PIE1AD1
PIF1AD1
Freescale Semiconductor
Access: User read/write
Access: User read/write
0
0
1
1
PIE1AD0
PIF1AD0
0
0
0
0
1
1