sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 277

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sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Windowed COP operation is enabled by setting WCOP in the CPMUCOP register. In this mode, writes to
the CPMUARMCOP register to clear the COP timer must occur in the last 25% of the selected time-out
period. A premature write will immediately reset the part.
7.5.3
The on-chip POR circuitry detects when the internal supply V
(voltage level not specified in this document because this supply is not visible on device pins). POR is
deasserted, if the internal supply V
this document because this supply is not visible on device pins).
7.5.4
The on-chip LVR circuitry detects when one of the supply voltages V
appropriate voltage level. If LVR is deasserted the MCU is fully operational at the specified maximum
speed.The LVR assert and deassert levels for the supply voltage VDDX are V
specified in the device Reference Manual.
7.6
The interrupt/reset vectors requested by the S12CPMU are listed in
specification for related vector addresses and priorities.
Freescale Semiconductor
Interrupts
Power-On Reset (POR)
Low-Voltage Reset (LVR)
RTI time-out interrupt
Low voltage interrupt
Interrupt Source
Periodical Interrupt
PLL lock interrupt
High temperature
Oscillator status
Autonomous
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
interrupt
interrupt
Table 7-27. S12CPMU Interrupt Vectors
DD
exceeds an appropriate voltage level (voltage level not specified in
S12 Clock, Reset and Power Management Unit (S12CPMU) Block Description
Mask
CCR
I bit
I bit
I bit
I bit
I bit
I bit
CPMUAPICTL (APIE)
CPMUHTCTL (HTIE)
CPMUINT (LOCKIE)
CPMULVCTL (LVIE)
CPMUINT (OSCIE)
CPMUINT (RTIE)
DD
Local Enable
drops below an appropriate voltage level
Table
DD
, V
7-27. Refer to MCU
DDF
LVRXA
or V
and V
DDX
drops below an
LVRXD
and are
277

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