sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 214

• Manufacturer Part Number: sc9s12hy64j0vllr
• Description: S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
• Manufacturer: Freescale Semiconductor, Inc

S12S Debug Module (S12SDBGV2)
each trace buffer entry. In Detail mode CINF comprises of R/W and size access information (CRW and
CSZ respectively).
Single byte data accesses in Detail Mode are always stored to the low byte of the trace buffer (DATAL)
and the high byte is cleared. When tracing word accesses, the byte at the lower address is always stored to
trace buffer byte1 and the byte at the higher address is stored to byte0.
6.4.5.3.1
The format of the bits is dependent upon the active trace mode as described below.
Field2 Bits in Detail Mode
In Detail Mode the CSZ and CRW bits indicate the type of access being made by the CPU.
214
ADDR[17]
ADDR[16]
CRW
CSZ
Normal/Loop1
Bit
Detail Mode
3
2
1
0
Modes
Mode
Access Type Indicator— This bit indicates if the access was a byte or word size when tracing in Detail Mode
0 Word Access
1 Byte Access
Read Write Indicator — This bit indicates if the corresponding stored address corresponds to a read or write
access when tracing in Detail Mode.
0 Write Access
1 Read Access
Address Bus bit 17— Corresponds to system address bus bit 17.
Address Bus bit 16— Corresponds to system address bus bit 16.
Information Bit Organization
Number
Entry 1
Entry 2
Entry 1
Entry 2
Entry
Table 6-37. Trace Buffer Organization (Normal,Loop1,Detail modes)
CINF1,ADRH1
CINF2,ADRH2
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Field 2
4-bits
PCH1
PCH2
0
0
Figure 6-25. Field2 Bits in Detail Mode
Bit 3
CSZ
Table 6-38. Field Descriptions
CRW
Bit 2
DATAH1
DATAH2
ADRM1
ADRM2
ADDR[17] ADDR[16]
Field 1
Description
PCM1
PCM2
8-bits
Bit 1
Bit 0
DATAL1
DATAL2
Field 0
ADRL1
ADRL2
8-bits
PCL1
PCL2
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