sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 255

• Manufacturer Part Number: sc9s12hy64j0vllr
• Description: S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
• Manufacturer: Freescale Semiconductor, Inc

7.3.2.17
The CPMUAPIRH and CPMUAPIRL registers allow the configuration of the autonomous periodical
interrupt rate.
Read: Anytime
Write: If APIFE=0, then write anytime, else writes have no effect.
The period can be calculated as follows depending on logical value of the APICLK bit:
Freescale Semiconductor
0x02F4
0x02F5
APIR[15:0]
Reset
Reset
Field
15-0
W
W
R
R
APICLK=0: Period = 2*(APIR[15:0] + 1) * f
APICLK=1: Period = 2*(APIR[15:0] + 1) * Bus Clock period
APIR15
APIR7
Autonomous Periodical Interrupt Rate Bits — These bits define the time-out period of the API. See
Table 7-19
Figure 7-21. Autonomous Periodical Interrupt Rate High Register (CPMUAPIRH)
Autonomous Periodical Interrupt Rate High and Low Register
(CPMUAPIRH / CPMUAPIRL)
Figure 7-22. Autonomous Periodical Interrupt Rate Low Register (CPMUAPIRL)
0
0
7
7
= Unimplemented or Reserved
for details of the effect of the autonomous periodical interrupt rate bits.
APIR14
APIR6
Table 7-18. CPMUAPIRH / CPMUAPIRL Field Descriptions
0
0
6
6
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
APIR13
APIR5
0
0
5
5
S12 Clock, Reset and Power Management Unit (S12CPMU) Block Description
APIR12
APIR4
0
0
4
4
ACLK
Description
APIR11
APIR3
0
0
3
3
APIR10
APIR2
0
0
2
2
APIR9
APIR1
0
0
1
1
APIR8
APIR0
0
0
0
0
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