sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 339

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sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
9.3.3.2
The eight data segment registers, each with bits DB[7:0], contain the data to be transmitted or received.
The number of bytes to be transmitted or received is determined by the data length code in the
corresponding DLR register.
Module Base + 0x00X4 to Module Base + 0x00XB
Freescale Semiconductor
Module Base + 0x00X2
Module Base + 0x00X3
DB[7:0]
Field
7-0
Reset:
Reset:
Reset:
W
W
R
R
Figure 9-34. Data Segment Registers (DSR0–DSR7) — Extended Identifier Mapping
W
R
Data bits 7-0
Data Segment Registers (DSR0-7)
7
x
7
x
DB7
7
x
= Unused; always read ‘x’
= Unused; always read ‘x’
Figure 9-32. Identifier Register 2 — Standard Mapping
Figure 9-33. Identifier Register 3 — Standard Mapping
Table 9-33. DSR0–DSR7 Register Field Descriptions
6
x
6
x
DB6
MC9S12HY/HA-Family Reference Manual Rev. 1.04
x
6
5
x
5
x
DB5
5
x
4
x
4
x
DB4
Description
4
x
Freescale’s Scalable Controller Area Network (S12MSCANV3)
x
x
DB3
3
3
x
3
DB2
2
x
2
x
2
x
DB1
x
x
1
1
1
x
DB0
0
x
0
x
x
0
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