sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 327

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sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
The IDHITx indicators are always related to the message in the foreground buffer (RxFG). When a
message gets shifted into the foreground buffer of the receiver FIFO the indicators are updated as well.
9.3.2.13
This register is reserved for factory testing of the MSCAN module and is not available in normal system
operating modes.
Freescale Semiconductor
IDHIT[2:0]
IDAM[1:0]
Field
5-4
2-0
Identifier Acceptance Mode — The CPU sets these flags to define the identifier acceptance filter organization
(see
mode, no message is accepted such that the foreground buffer is never reloaded.
Identifier Acceptance Hit Indicator — The MSCAN sets these flags to indicate an identifier acceptance hit (see
Section 9.4.3, “Identifier Acceptance
MSCAN Reserved Register
IDHIT2
IDAM1
Section 9.4.3, “Identifier Acceptance
0
0
1
1
0
0
0
0
1
1
1
1
Table 9-18. CANIDAC Register Field Descriptions
Table 9-19. Identifier Acceptance Mode Settings
Table 9-20. Identifier Acceptance Hit Indication
MC9S12HY/HA-Family Reference Manual Rev. 1.04
IDHIT1
IDAM0
0
1
0
1
0
0
1
1
0
0
1
1
Filter”).
IDHIT0
Filter”).
0
1
0
1
0
1
0
1
Table 9-20
Description
Table 9-19
Identifier Acceptance Mode
Four 16-bit acceptance filters
Two 32-bit acceptance filters
Eight 8-bit acceptance filters
Freescale’s Scalable Controller Area Network (S12MSCANV3)
summarizes the different settings.
Filter closed
summarizes the different settings. In filter closed
Identifier Acceptance Hit
Filter 0 hit
Filter 1 hit
Filter 2 hit
Filter 3 hit
Filter 4 hit
Filter 5 hit
Filter 6 hit
Filter 7 hit
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