sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 431

• Manufacturer Part Number: sc9s12hy64j0vllr
• Description: S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
• Manufacturer: Freescale Semiconductor, Inc

12.3.2.5
Read: Anytime, if AMAP = 1
Write: Anytime, if AMAP = 1
Freescale Semiconductor
Module Base + 0x0002
BERRM[1:0]
BKDFE
Reset
Field
2:1
0
W
R
BERRM1
Bit Error Mode — Those two bits determines the functionality of the bit error detect feature. See
Break Detect Feature Enable — BKDFE enables the break detect circuitry.
0 Break detect circuit disabled
1 Break detect circuit enabled
0
0
1
1
SCI Alternative Control Register 2 (SCIACR2)
0
0
7
= Unimplemented or Reserved
BERRM0
Figure 12-8. SCI Alternative Control Register 2 (SCIACR2)
0
1
0
1
0
0
6
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Bit error detect circuit is disabled
Receive input sampling occurs during the 9th time tick of a transmitted bit
(refer to
Receive input sampling occurs during the 13th time tick of a transmitted bit
(refer to
Reserved
Table 12-8. SCIACR2 Field Descriptions
Table 12-9. Bit Error Mode Coding
0
0
5
Figure
Figure
12-19)
12-19)
0
0
4
Description
Function
0
0
3
Serial Communication Interface (S12SCIV5)
BERRM1
0
2
BERRM0
0
1
Table
BKDFE
12-9.
0
0
431