sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 235

• Manufacturer Part Number: sc9s12hy64j0vllr
• Description: S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
• Manufacturer: Freescale Semiconductor, Inc

7.3.2
This section describes all the S12CPMU registers and their individual bits.
Address order is as listed in
7.3.2.1
The CPMUSYNR register controls the multiplication factor of the PLL and selects the VCO frequency
range.
Read: Anytime
Write: If PROT=0 (CPMUPROT register) and PLLSEL=1 (CPMUCLKS register), then write anytime.
Else write has no effect.
The VCOFRQ[1:0] bits are used to configure the VCO gain for optimal stability and lock time. For correct
PLL operation the VCOFRQ[1:0] bits have to be selected according to the actual target VCOCLK
frequency as shown in
PLL (no locking and/or insufficient stability).
Freescale Semiconductor
0x0034
Reset
W
If PLL has locked (LOCK=1)
R
Register Descriptions
S12CPMU Synthesizer Register (CPMUSYNR)
0
7
VCOFRQ[1:0]
Writing to this register clears the LOCK and UPOSC status bits.
f
frequency f
VCO
must be within the specified VCO frequency lock range. Bus
Table
Figure 7-4. S12CPMU Synthesizer Register (CPMUSYNR)
1
6
bus
Figure
7-1. Setting the VCOFRQ[1:0] bits incorrectly can result in a non functional
must not exceed the specified maximum.
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 7-1. VCO Clock Frequency Selection
VCOCLK Frequency Ranges
32MHz <= f
48MHz < f
7-3.
0
5
Reserved
Reserved
f VCO
VCO
VCO
S12 Clock, Reset and Power Management Unit (S12CPMU) Block Description
<= 64MHz
<= 48MHz
=
NOTE
NOTE
1
4
2 f REF
1
3
SYNDIV
VCOFRQ[1:0]
SYNDIV[5:0]
00
01
10
11
+
1
1
2
1
1
1
0
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