sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 316

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sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Freescale’s Scalable Controller Area Network (S12MSCANV3)
1. Read: Anytime
316
Module Base + 0x0001
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1); CANE is write once
CLKSRC
LOOPB
LISTEN
WUPM
BORM
CANE
Field
7
6
5
4
3
2
Reset:
W
R
MSCAN Enable
0 MSCAN module is disabled
1 MSCAN module is enabled
MSCAN Clock Source — This bit defines the clock source for the MSCAN module (only for systems with a clock
generation module;
0 MSCAN clock source is the oscillator clock
1 MSCAN clock source is the bus clock
Loopback Self Test Mode — When this bit is set, the MSCAN performs an internal loopback which can be used
for self test operation. The bit stream output of the transmitter is fed back to the receiver internally. The RXCAN
input is ignored and the TXCAN output goes to the recessive state (logic 1). The MSCAN behaves as it does
normally when transmitting and treats its own transmitted message as a message received from a remote node.
In this state, the MSCAN ignores the bit sent during the ACK slot in the CAN frame acknowledge field to ensure
proper reception of its own message. Both transmit and receive interrupts are generated.
0 Loopback self test disabled
1 Loopback self test enabled
Listen Only Mode — This bit configures the MSCAN as a CAN bus monitor. When LISTEN is set, all valid CAN
messages with matching ID are received, but no acknowledgement or error frames are sent out (see
Section 9.4.4.4, “Listen-Only
applications which require “hot plugging” or throughput analysis. The MSCAN is unable to transmit any
messages when listen only mode is active.
0 Normal operation
1 Listen only mode activated
Bus-Off Recovery Mode — This bits configures the bus-off state recovery mode of the MSCAN. Refer to
Section 9.5.2, “Bus-Off
0 Automatic bus-off recovery (see Bosch CAN 2.0A/B protocol specification)
1 Bus-off recovery upon user request
Wake-Up Mode — If WUPE in CANCTL0 is enabled, this bit defines whether the integrated low-pass filter is
applied to protect the MSCAN from spurious wake-up (see
0 MSCAN wakes up on any dominant level on the CAN bus
1 MSCAN wakes up only in case of a dominant pulse on the CAN bus that has a length of T
CANE
0
7
= Unimplemented
CLKSRC
Figure 9-5. MSCAN Control Register 1 (CANCTL1)
6
0
Table 9-4. CANCTL1 Register Field Descriptions
Section 9.4.3.2, “Clock
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Recovery,” for details.
Mode”). In addition, the error counters are frozen. Listen only mode supports
LOOPB
0
5
System,” and
LISTEN
4
1
Description
Section Figure 9-43., “MSCAN Clocking
BORM
Section 9.4.5.5, “MSCAN Sleep
0
3
WUPM
2
0
Access: User read/write
Freescale Semiconductor
SLPAK
0
1
Mode”).
wup
Scheme,”).
INITAK
0
1
(1)

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