sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 340

• Manufacturer Part Number: sc9s12hy64j0vllr
• Description: S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
• Manufacturer: Freescale Semiconductor, Inc

Freescale’s Scalable Controller Area Network (S12MSCANV3)
9.3.3.3
This register keeps the data length field of the CAN frame.
9.3.3.4
This register defines the local priority of the associated message buffer. The local priority is used for the
internal prioritization process of the MSCAN and is defined to be highest for the smallest binary number.
The MSCAN implements the following internal prioritization mechanisms:
340
Module Base + 0x00XC
DLC[3:0]
Field
•
3-0
Reset:
All transmission buffers with a cleared TXEx flag participate in the prioritization immediately
before the SOF (start of frame) is sent.
W
R
Data Length Code Bits — The data length code contains the number of bytes (data byte count) of the respective
message. During the transmission of a remote frame, the data length code is transmitted as programmed while
the number of transmitted data bytes is always 0. The data byte count ranges from 0 to 8 for a data frame.
Table 9-35
Data Length Register (DLR)
Transmit Buffer Priority Register (TBPR)
7
x
Figure 9-35. Data Length Register (DLR) — Extended Identifier Mapping
DLC3
0
0
0
0
0
0
0
0
1
shows the effect of setting the DLC bits.
= Unused; always read “x”
6
x
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 9-34. DLR Register Field Descriptions
DLC2
0
0
0
0
1
1
1
1
0
Data Length Code
Table 9-35. Data Length Codes
5
x
DLC1
4
x
0
0
1
1
0
0
1
1
0
Description
DLC3
x
3
DLC0
0
1
0
1
0
1
0
1
0
DLC2
2
x
Data Byte
Count
Freescale Semiconductor
DLC1
0
1
2
3
4
5
6
7
8
x
1
DLC0
0
x