sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 272
sc9s12hy64j0vllr
Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.SC9S12HY64J0VLLR.pdf
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S12 Clock, Reset and Power Management Unit (S12CPMU) Block Description
The use of the filter function is only possible if the VCOCLK-to-OSCCLK ratio divided by two ((f
f
If enabled, the oscillator filter is sampling the incoming oscillator clock signal (EXTAL) with the
VCOCLK frequency.
Using VCOCLK, a time window is defined during which an edge of the OSCCLK is expected. In case of
OSCBW = 1 the width of this window is three VCOCLK cycles, if the OSCBW = 0 it is one VCOCLK
cycle.
The noise detection is active for certain combinations of OSCFILT[4:0] and OSCBW bit settings as shown
in
272
OSC
Table 7-24
)/2) is an integer number. This integer value must be written to the OSCFILT[4:0] bits.
If the VCOCLK frequency is higher than 25 MHz the wide bandwidth must
be selected (OSCBW = 1).
OSCFILT[4:0]
2 or 3
>=4
0
1
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 7-24. Noise Detection Settings
OSCBW
x
x
0
1
x
NOTE
Detection
disabled
disabled
disabled
active
active
disabled
active
active
active
active
Filter
Freescale Semiconductor
VCO
/
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