sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 627

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sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
All assigned bits in the FERCNFG register are readable and writable.
17.3.2.7
The FSTAT register reports the operational status of the Flash module.
1
CCIF, ACCERR, and FPVIOL bits are readable and writable, MGBUSY and MGSTAT bits are readable
but not writable, while remaining bits read 0 and are not writable.
Freescale Semiconductor
Reset value can deviate from the value shown if a double bit fault is detected during the reset sequence (see
Offset Module Base + 0x0005
Offset Module Base + 0x0006
Reset
DFDIE
Reset
SFDIE
Field
1
0
W
W
R
R
CCIF
Double Bit Fault Detect Interrupt Enable — The DFDIE bit controls interrupt generation when a double bit fault
is detected during a Flash block read operation.
0 DFDIF interrupt disabled
1 An interrupt will be requested whenever the DFDIF flag is set (see
Single Bit Fault Detect Interrupt Enable — The SFDIE bit controls interrupt generation when a single bit fault
is detected during a Flash block read operation.
0 SFDIF interrupt disabled whenever the SFDIF flag is set (see
1 An interrupt will be requested whenever the SFDIF flag is set (see
Flash Status Register (FSTAT)
0
0
1
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 17-10. Flash Error Configuration Register (FERCNFG)
0
0
0
0
6
6
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Figure 17-11. Flash Status Register (FSTAT)
Table 17-13. FERCNFG Field Descriptions
ACCERR
0
0
0
5
5
FPVIOL
0
0
0
4
4
Description
MGBUSY
0
0
0
3
3
Section
Section
Section
64 KByte Flash Module (S12FTMRC64K1V1)
RSVD
17.3.2.8)
0
0
0
2
2
17.3.2.8)
17.3.2.8)
DFDIE
0
0
1
1
1
MGSTAT[1:0]
Section
SFDIE
0
0
0
0
1
17.6).
627

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