sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 72

no-image

sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1
1
Port Integration Module (S12HYPIMV1)
2.3.4
2.3.5
72
Function
Address 0x0001 (PRR)
Address 0x0002 (PRR)
Read: Anytime. The data source is depending on the data direction value.
Write: Anytime
Read: Anytime
Write: Anytime
Altern.
Field
Reset
Reset
7-0
PB
W
W
R
R
Port B general purpose input/output data—Data Register, LCD segment driver output
The associated pin can be used as general purpose I/O when not used as alternative function. In general purpose
output mode the register bit value is driven to the pin. If the associated data direction bit is set to 1, a read returns
the value of the port register bit, otherwise the buffered pin input state is read.
• The LCD segment driver output takes precedence over the general purpose I/O function if the related LCD
DDRA7
Port B Data Register (PORTB)
Port A Data Direction Register (DDRA)
PB7
BP3
segment is enabled.
0
0
7
7
DDRA6
PB6
BP2
0
0
6
6
Figure 2-3. Port A Data Direction Register (DDRA)
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 2-5. PORTB Register Field Descriptions
Figure 2-2. Port B Data Register (PORTB)
DDRA5
PB5
BP1
0
0
5
5
DDRA4
PB4
BP0
0
0
4
4
Description
DDRA3
FP39
PB3
3
0
3
0
DDRA2
FP38
PB2
0
0
2
2
Freescale Semiconductor
DDRA1
Access: User read/write
Access: User read/write
FP37
PB1
0
0
1
1
DDRA0
FP28
PB7
0
0
0
0
1
1

Related parts for sc9s12hy64j0vllr