sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 329

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sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1. Read: Only when in sleep mode (SLPRQ = 1 and SLPAK = 1) or initialization mode (INITRQ = 1 and INITAK = 1)
9.3.2.16
This register reflects the status of the MSCAN transmit error counter.
1. Read: Only when in sleep mode (SLPRQ = 1 and SLPAK = 1) or initialization mode (INITRQ = 1 and INITAK = 1)
Freescale Semiconductor
Module Base + 0x000E
Module Base + 0x000F
Write: Unimplemented
Write: Unimplemented
Reset:
Reset:
W
W
R
R
MSCAN Transmit Error Counter (CANTXERR)
RXERR7
TXERR7
Reading this register when in any other mode other than sleep or
initialization mode may return an incorrect value. For MCUs with dual
CPUs, this may result in a CPU fault condition.
Writing to this register when in special modes can alter the MSCAN
functionality.
Reading this register when in any other mode other than sleep or
initialization mode, may return an incorrect value. For MCUs with dual
CPUs, this may result in a CPU fault condition.
Writing to this register when in special modes can alter the MSCAN
functionality.
0
0
7
7
Figure 9-19. MSCAN Transmit Error Counter (CANTXERR)
Figure 9-18. MSCAN Receive Error Counter (CANRXERR)
RXERR6
TXERR6
= Unimplemented
= Unimplemented
6
0
6
0
MC9S12HY/HA-Family Reference Manual Rev. 1.04
RXERR5
TXERR5
0
0
5
5
RXERR4
TXERR4
NOTE
NOTE
4
0
4
0
Freescale’s Scalable Controller Area Network (S12MSCANV3)
RXERR3
TXERR3
0
0
3
3
RXERR2
TXERR2
2
0
2
0
Access: User read/write
Access: User read/write
RXERR1
TXERR1
0
0
1
1
RXERR0
TXERR0
0
0
0
0
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