sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 117

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sc9s12hy64j0vllr

Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1
1
2.3.74
2.3.75
Freescale Semiconductor
Address 0x0291
Address 0x0292
Read: Anytime.
Write:Never, writes to this register have no effect.
Read: Anytime.
Write: Anytime.
7,5,3,1
6,4,2,0
DDRU
DDRU
Field
Field
PTIU
Reset
Reset
7-0
W
W
R
R
Port U input data—
This register always reads back the buffered state of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
Port U data direction—
If enabled the Motor driver PWM output it will force the I/O state to be output.
1 Associated pin is configured as output.
0 Associated pin is configured as input.
Port U data direction—
If enabled the Motor driver PWM output it will force the I/O state to be output.
Else if corresponding TIM0 output compare channel is enabled, it will be force as output
1 Associated pin is configured as output.
0 Associated pin is configured as input.
DDRU7
PTIU7
Port U Input Register (PTIU)
Port U Data Direction Register (DDRU)
u
0
7
7
= Unimplemented or Reserved
DDRU6
PTIU6
u
0
6
6
Figure 2-73. Port U Data Direction Register (DDRU)
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Table 2-64. DDRU Register Field Descriptions
Table 2-63. PTIU Register Field Descriptions
Figure 2-72. Port U Input Register (PTIU)
DDRU5
PTIU5
u
0
5
5
DDRU4
PTIU4
u
0
4
4
Description
Description
u = Unaffected by reset
DDRU3
PTIU3
3
u
3
0
DDRU2
PTIU2
Port Integration Module (S12HYPIMV1)
u
0
2
2
DDRU1
Access: User read/write
PTIU1
u
0
1
1
Access: User read
DDRU0
PTIU0
u
0
0
0
117
1
1

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