sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 318

• Manufacturer Part Number: sc9s12hy64j0vllr
• Description: S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
• Manufacturer: Freescale Semiconductor, Inc

Freescale’s Scalable Controller Area Network (S12MSCANV3)
9.3.2.4
The CANBTR1 register configures various CAN bus timing parameters of the MSCAN module.
1. Read: Anytime
1. In this case, PHASE_SEG1 must be at least 2 time quanta (Tq).
318
Module Base + 0x0003
TSEG2[2:0]
TSEG1[3:0]
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1)
SAMP
Field
6-4
3-0
7
Reset:
W
R
Sampling — This bit determines the number of CAN bus samples taken per bit time.
0 One sample per bit.
1 Three samples per bit
If SAMP = 0, the resulting bit value is equal to the value of the single bit positioned at the sample point. If
SAMP = 1, the resulting bit value is determined by using majority rule on the three total samples. For higher bit
rates, it is recommended that only one sample is taken per bit time (SAMP = 0).
Time Segment 2 — Time segments within the bit time fix the number of clock cycles per bit time and the location
of the sample point (see
9.
Time Segment 1 — Time segments within the bit time fix the number of clock cycles per bit time and the location
of the sample point (see
10.
MSCAN Bus Timing Register 1 (CANBTR1)
SAMP
0
7
BRP5
0
0
0
0
1
:
TSEG22
Figure 9-7. MSCAN Bus Timing Register 1 (CANBTR1)
BRP4
0
0
0
0
1
:
6
0
Table 9-8. CANBTR1 Register Field Descriptions
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
(1)
Figure
Figure
BRP3
.
0
0
0
0
1
:
TSEG21
Table 9-7. Baud Rate Prescaler
9-44). Time segment 2 (TSEG2) values are programmable as shown in
9-44). Time segment 1 (TSEG1) values are programmable as shown in
0
5
BRP2
0
0
0
0
1
:
TSEG20
BRP1
4
0
0
0
1
1
1
:
Description
BRP0
TSEG13
0
1
0
1
1
:
0
3
TSEG12
Prescaler value (P)
2
0
64
1
2
3
4
:
Access: User read/write
TSEG11
Freescale Semiconductor
0
1
TSEG10
Table 9-
Table 9-
0
0
(1)