ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 143

• Manufacturer Part Number: ez80190
• Description: Ez80190 Microprocessor
• Manufacturer: ZiLOG Semiconductor

PS006613-0306
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
[7:0]
MACC_yRELOAD
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
7
MACC_IE
6
NOISE
MACC y DATA Reload Address Register
The MACC_yRELOAD register, indicated in
within the y DATA of MACC RAM. When the y DATA address increments to the
value in MACC_yEND, the next y DATA address is taken from this
MACC_yRELOAD register.
MACC Control Register
The MACC Control register, indicated in
including interrupt enable on completion of calculation. All writes to this register
clear the 40-bit accumulator to 0 (MACC_ACx =
Value Description
0
1
0
1
Table 66. MACC y DATA Reload Address Register
Value Description
00h–
FFh
MACC interrupt is disabled.
The MACC interrupt is enabled for the calculation currently being
defined. The MACC generates an interrupt request to the CPU
when it completes this calculation (DONE).
All NOISE bits added to the accumulator using IN_SHIFT are 0.
All NOISE bits added to the accumulator using IN_SHIFT are 1.
R/W
R/W
Table 67. MACC Control Register
7
0
7
0
Reload address for the y DATA of MACC RAM.
(MACC_yRELOAD = E6h)
R/W
R/W
(MACC_CTL = E7h)
6
0
6
0
PRELIMINARY
R/W
R/W
5
0
5
0
R/W
R/W
Table
4
0
4
0
Table
67, provides added MACC features
R/W
R/W
3
0
3
0
00h
eZ80190 Product Specification
66, defines the reload address
}.
R/W
R/W
2
0
2
0
R/W
R/W
1
0
1
0
Multiply-Accumulator
R/W
R/W
0
0
0
0
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