ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 64

• Manufacturer Part Number: ez80190
• Description: Ez80190 Microprocessor
• Manufacturer: ZiLOG Semiconductor

eZ80190 Product Specification
50
•
Depending upon the instruction, either RD or WR are activated (driven Low)
If the upper and lower bounds are set to the same value, such that CSx_UBR =
CSx_LBR, then a particular Chip Select is valid for, at most, a single 64 KB page.
Again, if a higher-priority Chip Select also encompasses the same set of
addresses, then the lower-priority Chip Select is not generated.
Memory Chip Select Priority
A lower-numbered Chip Select is granted priority over a higher-numbered Chip
Select. If the Chip Select 0 address space overlaps the Chip Select 1 address
space, Chip Select 0 is active. If the address range programmed for any Chip
Select signal overlaps with the address of internal RAM, then RAM is accorded
higher priority. If the particular Chip Select(s) feature an address range that over-
laps with the RAM address, then when RAM is selected, the Chip Select signal is
not asserted.
Reset States
On reset, Chip Select 0 is active for all addresses, because its Lower Bound regis-
ter resets to
and its Upper Bound register resets to
. All of the other
0000h
FFFFh
Chip Select Lower and Upper Bound registers reset to
.
0000h
Memory Chip Select Example
The use of Memory Chip Selects is demonstrated in
Figure
8. The associated
control register values indicated in
Table
17. In this example, all 4 Chip Selects
are enabled and configured for memory addresses. CS0, CS1, and CS2 are all
configured such that their address spaces do not overlap. CS3 is allocated an
address space that spans the entire 16 MB of available memory. Consequently,
CS3 overlaps the address spaces for CS0, CS1, and CS2. However, because
CS3 is the lowest-priority Chip Select, it only becomes active where it does not
overlap either CS0, CS1, or CS2.
PS006613-0306
PRELIMINARY
Chip Selects and Wait States