ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 52
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ez80190
Manufacturer Part Number
ez80190
Description
Ez80190 Microprocessor
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80190.pdf
(222 pages)
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PS006613-0306
Bit
Reset
CPU Access
Note: W = Write Only.
Bit
Position
[7:0]
TMR_RR_L
Bit
Reset
CPU Access
Note: W = Write Only.
Bit
Position
[7:0]
TMR_RR_H
Note:
Timer Reload High Byte Registers
The Timer Reload High Byte registers, detailed in
cant byte (MSB) of the 2-byte timer reload value. In CONTINUOUS mode, the
timer reload value is reloaded into the timer upon reaching an end-of-count. When
the RST_EN bit (TMRx_CTL[1]) is set to 1 to enable the automatic reload and
restart function, the timer reload value is written to the timer on the next rising
edge of the clock.
TMR2_RR_H = 0088h, TMR3_RR_H = 008Bh, TMR4_RR_H = 008Eh)
TMR2_RR_L = 0087h, TMR3_RR_L = 008Ah, TMR4_RR_L = 008Dh)
The timer data registers and timer reload registers share the same
address space.
Value
00h–FFh These bits represent the Low byte of the 2-byte timer
Value
00h–FFh These bits represent the High byte of the 2-byte timer
(TMR0_RR_H = 0082h, TMR1_RR_H = 0085h,
(TMR0_RR_L = 0081h, TMR1_RR_L = 0084h,
Table 9. Timer Reload High Byte Registers
Table 8. Timer Reload Low Byte Registers
W
W
7
0
7
0
Description
reload value, {TMRx_RR_H[7:0], TMRx_RR_L[7:0]}. Bit 7
is bit 7 of the 16-bit timer reload value. Bit 0 is bit 0 (lsb) of
the 16-bit timer reload value.
Description
reload value, {TMRx_RR_H[7:0], TMRx_RR_L[7:0]}. Bit 7
is bit 15 (msb) of the 16-bit timer reload value. Bit 0 is bit 8
of the 16-bit timer reload value.
W
W
6
0
6
0
PRELIMINARY
W
W
5
0
5
0
W
W
4
0
4
0
W
W
3
0
3
0
eZ80190 Product Specification
Table
W
W
2
0
2
0
9, stores the most signifi-
Programmable Reload Timers
W
W
1
0
1
0
W
W
0
0
0
0
38
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