ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 171

• Manufacturer Part Number: ez80190
• Description: Ez80190 Microprocessor
• Manufacturer: ZiLOG Semiconductor

PS006613-0306
Bit
Position
4
BRK_ADDR1
4
BRK_ADDR0
2
IGN_LOW_1
Value Description
0
1
0
1
0
1
The ZDI break, upon matching break address 1, is disabled.
The ZDI break, upon matching break address 1, is enabled.
ZDI asserts a break when the CPU address, ADDR[23:0],
matches the value in the ZDI Address Match 1 registers,
{ZDI_ADDR1_U, ZDI_ADDR1_H, ZDI_ADDR1_L}. If the
IGN_LOW_1 bit is set to 1, ZDI asserts a break with the upper
two bytes of the CPU address, ADDR[23:8], and matches the
value in the ZDI Address Match 1 High and Low Byte
registers, {ZDI_ADDR1_U, ZDI_ADDR1_LH}. The lower byte
of the address is ignored. Breaks can only occur on an
instruction boundary. If the address is not the beginning of an
instruction, then the break occurs at the end of the current
instruction. The break is implemented by setting the
BRK_NEXT bit to 1. The BRK_NEXT bit must be reset to 0 to
release the break.
The ZDI break, upon matching break address 0, is disabled.
The ZDI break, upon matching break address 0, is enabled.
ZDI asserts a break when the CPU address, ADDR[23:0],
matches the value in the ZDI Address Match 1 registers,
{ZDI_ADDR0_U, ZDI_ADDR0_H, ZDI_ADDR0_L}. If the
IGN_LOW_0 bit is set to 1, ZDI asserts a break with the upper
two bytes of the CPU address, ADDR[23:8], and matches the
value in the ZDI Address Match 0 High and Low Byte
registers, {ZDI_ADDR0_U, ZDI_ADDR0_LH}. The lower byte
of the address is ignored. Breaks can only occur on an
instruction boundary. If the address is not the beginning of an
instruction, then the break occurs at the end of the current
instruction.The break is implemented by setting the
BRK_NEXT bit to 1. The BRK_NEXT bit must be reset to 0 to
release the break.
The Ignore the Low byte function of the ZDI Address Match 1
registers is disabled. If BRK_ADDR1 is set to 1, ZDI initiates a
break when the entire 24-bit address, ADDR[23:0], matches
the 3-byte value {ZDI_ADDR1_U, ZDI_ADDR1_H,
ZDI_ADDR1_L}.
The Ignore the Low byte function of the ZDI Address Match 1
registers is enabled. If BRK_ADDR1 is set to 1, ZDI initiates a
break when only the upper 2 bytes of the 24-bit address,
ADDR[23:8], match the 2-byte value {ZDI_ADDR1_U,
ZDI_ADDR1_H}. As a result, a break can occur anywhere
within a 256-byte page.
PRELIMINARY
eZ80190 Product Specification
ZiLOG Debug Interface
157