ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 206
ez80190
Manufacturer Part Number
ez80190
Description
Ez80190 Microprocessor
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80190.pdf
(222 pages)
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PS006613-0306
READ on Data Bus
General Purpose I/O Port Input Sample Timing
General Purpose I/O Port Output Timing
Port Output
Input Value
GPIO Input
GPIO Data
EXTAL
Data Latch
GPIO Pin
System
Figure 46
port pin is sampled on the rising edge of the system clock. The port value is then
available to the CPU on the second rising clock edge following the change of the
port value.
Figure 47
Clock
illustrates timing of the GPIO input sampling. The input value on a GPIO
and
T
1
Table 119
Figure 46. Port Input Sample Timing
Figure 47. GPIO Port Output Timing
T
CLK
Data Register
Port Value
Changes to 0
Into GPIO
0 Latched
indicate the timing of the GPIO outputs.
PRELIMINARY
T
CLK
GPIO Data Register
Value 0 Read
by eZ80
T
2
AC Characteristics
192
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