ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 169

• Manufacturer Part Number: ez80190
• Description: Ez80190 Microprocessor
• Manufacturer: ZiLOG Semiconductor

PS006613-0306
ZDI_ADDR2_U = 0Ah, ZDI_ADDR3_L = 0Ch, ZDI_ADDR3_H = 0Dh, ZDI_ADDR3_U = 0Eh)
(ZDI_ADDR0_L = 00h, ZDI_ADDR0_H = 01h, ZDI_ADDR0_U = 02h, ZDI_ADDR1_L = 04h,
ZDI_ADDR1_H = 05h, ZDI_ADDR1_U = 06h, ZDI_ADDR2_L = 08h, ZDI_ADDR2_H = 09h,
Bit
Reset
CPU Access
Note: X = Undefined; R/W = Read/Write.
Bit
Position
[7:0]
ZDI_ADDRX_L,
ZDI_ADDRX_H,
or
ZDI_ADDRX_U
Note:
eZ80190 device address is compared with the 3-byte address set,
{ZDI_ADDRx_U, ZDI_ADDRx_H, ZDI_ADDR_x_L}. If the CPU is operating in
ADL mode, the address is provided by ADDR[23:0]. If the CPU is operating in Z80
mode, the address is provided by {MBASE[7:0], ADDR[15:0]}. If a match is found,
ZDI issues a break to the eZ80190 device placing the processor in ZDI mode
pending further instructions from the ZDI interface block. If the address is not the
first op-code fetch, the ZDI break is executed at the end of the instruction in which
it is executed. There are four sets of address match registers. They can be used in
conjunction with each other to break on branching instructions.
Due to pipelining functions within the CPU, if the ZDI match address is
placed 1 or 2 bytes after completion of a repeating instruction (such as
LDIR), the break is issued following completion of only a single cycle of the
repeat. When execution is resumed, the repeating instruction completes
as required.
Value Description
00h–
FFh
Table 83. ZDI Address Match Registers
W
X
7
The 4 sets of ZDI address match registers are used for
setting the addresses for generating break points. The 24-
bit addresses are returned by {ZDI_ADDRx_U,
ZDI_ADDRx_H, ZDI_ADDRx_L, where x is 0, 1, 2, or 3.
W
X
6
PRELIMINARY
W
X
5
W
X
4
W
X
3
eZ80190 Product Specification
W
X
2
W
X
1
ZiLOG Debug Interface
W
X
0
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