ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 201

• Manufacturer Part Number: ez80190
• Description: Ez80190 Microprocessor
• Manufacturer: ZiLOG Semiconductor

PS006613-0306
External I/O Read Timing
Parameter
T
T
T
T
Note: *At the conclusion of a write cycle, deassertion of WR always occurs before any change to
ADDR[23:0]
7
8
9
10
DATA[7:0]
(input)
IORQ
ADDR, DATA, CSx, or MREQ.
CSx
X
RD
Figure 42
IN
Description
Clock Rise to MREQ Assertion Delay
Clock Rise to MREQ Deassertion Delay
Clock Fall to WR Assertion Delay
Clock Rise to WR Deassertion Delay*
and
Table 116. External Write Timing (Continued)
T
T
7
9
Table 117
T
1
T
Figure 42. External I/O Read Timing
5
diagram the timing for external I/O reads.
T
PRELIMINARY
CLK
T
3
T
T
2
T
T
8
10
8
Min.
T
2.8
1.6
1.5
1.4
4
Delay (ns)
AC Characteristics
Max.
9.6
6.9
3.9
4.1
187