ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 91

• Manufacturer Part Number: ez80190
• Description: Ez80190 Microprocessor
• Manufacturer: ZiLOG Semiconductor

PS006613-0306
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
[7:5]
4
LOOP
3
OUT2
2
OUT1
1
RTS
0
DTR
UART Modem Control Registers
These registers are used to control and check the modem status.
Value
000b
0
1
0–1
0–1
0–1
0–1
(UART0_MCTL = C4h, UART1_MCTL = D4h)
Table 34. UART Modem Control Registers
R/W
Description
Reserved—must be 000b.
LOOP-BACK is not enabled.
LOOP-BACK is enabled. The UART operates in internal
LOOP-BACK mode. The transmit data output port is
disconnected from the internal transmit data output and set to
1. The receive data input port is disconnected and internal
receive data is connected to internal transmit data. The
modem status input ports are disconnected and the four bits
of the modem control register are connected as modem status
inputs. The two modem control output ports (OUT1 & OUT2)
are set to their inactive state.
This bit does not function under normal operation. In LOOP-
BACK mode, this bit is connected to the DCD bit in the UART
Modem Status Register.
This bit does not function under normal operation. In LOOP-
BACK mode, this bit is connected to the RI bit in the UART
Modem Status Register.
Request to Send
Under normal operation, the RTS output port is the inverse of
this bit. In LOOP-BACK mode, this bit is connected to the CTS
bit in the UART Modem Status Register.
Data Terminal Ready
Under normal operation, the DTR output port is the inverse of
this bit. In LOOP-BACK mode, this bit is connected to the
DSR bit in the UART Modem Status Register.
7
0
R/W
6
0
PRELIMINARY
R/W
5
0
R/W
4
0
Universal Asynchronous Receiver/Transmitter
R/W
3
0
eZ80190 Product Specification
R/W
2
0
R/W
1
0
R/W
0
0
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