ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 161

• Manufacturer Part Number: ez80190
• Description: Ez80190 Microprocessor
• Manufacturer: ZiLOG Semiconductor

PS006613-0306
ZDI Interface
ZDI Clock and Data Conventions
PROCESSOR
TARGET
memory to occur as fast as the ZDI can download and upload data, with a maxi-
mum frequency of one-half the CPU clock frequency.
ZDI supports a bidirectional serial protocol. The protocol defines any device that
sends data as the transmitter and any receiving device as the receiver. The device
controlling the transfer is the master and the device being controlled is the slave.
The master always initiates the data transfers and provides the clock for both
receive and transmit operations. The ZDI block on the eZ80190 device is consid-
ered a slave in all data transfers.
Figure 27
connector allows the user to connect directly to the ZPAK II emulator using a six-
pin header.
The two pins used for communication with the ZDI block are the ZDI Clock pin
(ZCL) and the ZDI Data pin (ZDA). For general data communication, the data
value on the ZDA pin can change only when ZCL is Low (0). The only exception is
the ZDI START bit, which is indicated by a High-to-Low transition (falling edge) on
the ZDA pin while ZCL is High.
Data is shifted into and out of ZDI, with the most significant bit (bit 7) of each byte
being transferred first, and the least significant bit (bit 0) transferred last. All infor-
mation is passed between the master and the slave in 8-bit (single-byte) units.
Each byte is transferred with nine clock cycles: eight to shift the data, and the
ninth for internal operations.
Figure 27. Schematic For Building a Target Board ZPAK II Connector
illustrates the schematic for building a connector on a target board. This
ZCL
ZDA
330K
6-Pin Target Connector
PRELIMINARY
330K
2
4
6
eZ80190 Product Specification
5
3
1
(Target V
TV
ZiLOG Debug Interface
DD
DD
)
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