ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 69

• Manufacturer Part Number: ez80190
• Description: Ez80190 Microprocessor
• Manufacturer: ZiLOG Semiconductor

PS006613-0306
Bit
CS0 Reset
CS1 Reset
CS2 Reset
CS3 Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
[7:0]
CS_UBR
(CS0_UBR = A9h, CS1_UBR = ACh, CS2_UBR = AFh, CS3_UBR = B2h)
Chip Select x Upper Bound Register
For Memory Chip Selects, the Chip Select x Upper Bound register, detailed in
Table
ing Chip Select (if enabled) can be active. For I/O Chip Selects, this register pro-
duces no effect. The reset state for the Chip Select 0 Upper Bound register is
while the reset state for the 3 other Chip Select upper bound registers is
19, defines the upper bound of the address range for which the correspond-
Value Description
00h–
FFh
Table 19. Chip Select x Upper Bound Register
R/W
This bit specifies the upper bound of the Chip Select address
range. The upper byte of the address bus, ADDR[23:16], is
compared to the values contained in these registers for
determining if a Chip Select signal should be generated.
7
1
0
0
0
R/W
6
1
0
0
0
PRELIMINARY
R/W
5
1
0
0
0
R/W
4
1
0
0
0
R/W
3
1
0
0
0
eZ80190 Product Specification
R/W
2
1
0
0
0
Chip Selects and Wait States
R/W
1
1
0
0
0
R/W
0
1
0
0
0
00h
.
FFh
,
55