ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 80

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ez80190

Manufacturer Part Number
ez80190
Description
Ez80190 Microprocessor
Manufacturer
ZiLOG Semiconductor
Datasheet

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PS006613-0306
UART Functional Description
UART Functions
The core uses an externally-provided clock from the Baud Rate Generator for the
serial transmit/receive function. The UART module supports all of the various
options in the asynchronous transmission and reception protocol including:
The UART contains 16-byte FIFOs in each direction. The FIFOs can be enabled
or disabled by the application. The receive FIFO features trigger-level detection
logic, which enables the processor to block transfer data bytes from the receive
FIFO.
The UART data transfer rate is calculated in the following equation:
The UART function implements:
UART Transmitter
The transmitter block controls the data transmitted on the TXD output. It imple-
ments the FIFO, accessed through the UARTx_THR register, the transmit shift
register, the parity generator, and control logic for the transmitter to control param-
eters for the asynchronous communications protocol.
The UARTx_THR is a Write Only register. The processor writes the data byte to
be transmitted into this register. In FIFO mode, up to 16 data bytes can be written
through the UARTx_THR register. The data byte from the FIFO is transferred to
the transmit shift register and transmitted on the TXD pin. After SYNC_RESET,
the UARTx_THR register is empty so the Transmit Holding Register Empty
UART Data Transfer Rate (bits/s) =
5 to 8-bit transmit/receive
Start bit generation and detection
Parity generation and detection
Stop bit generation and detection
Break generation and detection
The transmitter and associated control logic
The receiver and associated control logic
The modem interface and associated logic
PRELIMINARY
16 x Baud Rate Generator Divisor
System Clock Frequency
Universal Asynchronous Receiver/Transmitter
eZ80190 Product Specification
66

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