ez80190 ZiLOG Semiconductor, ez80190 Datasheet - Page 40

• Manufacturer Part Number: ez80190
• Description: Ez80190 Microprocessor
• Manufacturer: ZiLOG Semiconductor

PS006613-0306
Address
(hex)
Universal ZiLOG Interface Blocks (continued)
C2
C3
C4
C5
C6
C7
C8
C9
CA
CB
CC
CD
CE
CF
D0
D1
D2
D3
D4
Notes:
1. After an external pin reset, the Watch-Dog Timer Control register resets to 00h. After a Watch-Dog Timer time-
2. When the CPU reads this register, the pin value of the port is read.
out reset, the Watch-Dog Timer Control register resets to 20h.
Mnemonic
UART0_IIR
UART0_FCTL
UART0_LCTL
UART0_MCTL
UART0_LSR
UART0_MSR
UART0_SPR
I2C0_SAR
I2C0_xSAR
I2C0_DR
I2C0_CTL
I2C0_SR
I2C0_CCR
I2C0_SRR
Not Accessible
UZI0_CTL
UART1_RBR
UART1_THR
BRG1_DLR_L
BRG1_DLR_H
UART1_IER
UART1_IIR
UART1_FCTL
UART1_LCTL
UART1_MCTL
Name
UART 0 Interrupt Identification Register
UART 0 FIFO Control Register
UART 0 Line Control Register
UART 0 Modem Control Register
UART 0 Line Status Register
UART 0 Modem Status Register
UART 0 Scratch Pad Register
I
I
I
I
I
I
I
UZI 0 Control Register
UART 1 Receive Buffer Register
UART 1 Transmit Holding Register
BRG 1 Divisor Latch Register—Low Byte
BRG 1 Divisor Latch Register—High Byte
UART 1 Interrupt Enable Register
UART 1 Interrupt Identification Register
UART 1 FIFO Control Register
UART 1 Line Control Register
UART 1 Modem Control Register
2
2
2
2
2
2
2
Table 2. Register Map (Continued)
C 0 Slave Address Register
C 0 Extended Slave Address Register
C 0 Data Register
C 0 Control Register
C 0 Status Register
C 0 Clock Control Register
C 0 Software Reset Register
PRELIMINARY
eZ80190 Product Specification
Reset
(hex)
XX
XX
XX
X0
F8
01
00
00
00
60
00
00
00
00
00
00
00
02
00
00
01
00
00
00
Access
CPU
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
W
W
W
R
R
R
R
R
R
Register Map
Page
102
103
104
104
107
108
110
73
74
75
77
78
80
81
62
71
70
62
63
72
73
74
75
77
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