tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 120

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tmp89fm42

Manufacturer Part Number
tmp89fm42
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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8.3 I/O Port Registers
8. I/O Ports
RA005
Port P4 output latch
Port P4 input/output control
Port P4 function control
Port P4 built-in pull-up resistor control
Port P4 input data
(0x0F1E)
(0x0F38)
(0x0F2B)
(0x0004)
(0x0011)
P4PRD
P4DR
P4CR
P4FC
P4PU
Note 1: Symbol "I" means secondary function input.
Note 2: When the key-on wakeup input (KWIi) is enabled (KWUCRm<KWnEN>="1"), there is no need to set P4CRi. (i=7 to 0,
Note 1: When the key-on wakeup input (KWIi) is enabled, there is no need to set P4FCi.
m=1 to 0, n=3 to 0)
Function
Function
Function
Function
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Bit Symbol
Bit Symbol
Bit Symbol
Bit Symbol
Bit Symbol
After reset
After reset
After reset
After reset
After reset
Function
0:
1:
0:
1:
0:
1:
0:
1:
Outputs L level when the output mode is selected.
Outputs H level when the output mode is selected.
Input mode (port input)
Output mode (port output)
Port function
The built-in pull-up resistor is not connected.
The built-in pull-up resistor is connected.
(The resistor is connected only when the key-on wakeup input (KWIi) is enabled or the port is used in the input
mode (P4FCi="0" and P4CRi="0"). Under any other conditions, setting to "1" does not make the resistor con-
nected.)
If the port is in the input mode, the contents of the port are read. If not, "0" is read.
P4PRD7
AIN7 (I)
AIN7 (I)
P4CR7
P4FC7
P4PU7
R/W
R/W
R/W
R/W
P47
R
7
0
7
0
7
0
7
0
7
*
P4PRD6
AIN6 (I)
AIN6 (I)
P4CR6
P4FC6
P4PU6
R/W
R/W
R/W
R/W
P46
R
6
0
6
0
6
0
6
0
6
*
P4PRD5
AIN5 (I)
AIN5 (I)
P4CR5
P4FC5
P4PU5
R/W
R/W
R/W
R/W
P45
R
5
0
5
0
5
0
5
0
5
*
Page 106
P4PRD4
AIN4 (I)
AIN4 (I)
P4CR4
P4FC4
P4PU4
R/W
R/W
R/W
R/W
P44
R
4
0
4
0
4
0
4
0
4
*
P4PRD3
AIN3 (I)
AIN3 (I)
P4CR3
P4FC3
P4PU3
R/W
R/W
R/W
R/W
P43
R
3
0
3
0
3
0
3
0
3
*
P4PRD2
AIN2 (I)
AIN2 (I)
P4CR2
P4PU2
P4FC2
R/W
R/W
R/W
R/W
P42
R
2
0
2
0
2
0
2
0
2
*
P4PRD1
AIN1 (I)
AIN1 (I)
P4CR1
P4FC1
P4PU1
R/W
R/W
R/W
R/W
P41
R
1
0
1
0
1
0
1
0
1
*
TMP89FM42
P4PRD0
AIN0 (I)
AIN0 (I)
P4CR0
P4FC0
P4PU0
R/W
R/W
R/W
R/W
P40
R
0
0
0
0
0
0
0
0
0
*

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