tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 53

• Manufacturer Part Number: tmp89fm42
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

RA001
System control register 4
System control status register 4
Internal factor reset detection status register
(0x0FCC)
(0x0FDF)
(0x0FDF)
SYSCR4
SYSSR4
IRSTSR
Note 3: After SYSCR3<RSTDIS> is modified, SYSCR4 should be written 0xB2 (Enable code for SYSCR3<RSTDIS>) in
Note 4: Bits 7 to 3 of SYSCR3 are read as "0".
Note 1: SYSCR4 is a write-only register, and must not be accessed by using a read-modify-write instruction, such as a bit opera-
Note 2: After SYSCR3<RSTDIS> is modified, SYSCR4 should be written 0xB2 (Enable code for SYSCR3<RSTDIS>) in NORMAL
Note 3: After IRSTSR<FCLR> is modified, SYSCR4 should be written 0x71 (Enable code for IRSTSR<FCLR> in NORMAL mode
Note 1: The enabled SYSCR3<RSTDIS> is initialized by a power-on reset only, and cannot be initialized by any other reset sig-
Note 2: Bits 7 to 3 of SYSCR4 are read as "0".
NORMAL1 mode when fcgck is fc/4 (CGCR<FCGCKSEL>=00). Otherwise, SYSCR3<RSTDIS> may be enabled at unex-
pected timing.
tion.
mode when fcgck is fc/4 (CGCR<FCGCKSEL>=00). Otherwise, SYSCR3<RSTDIS> may be enabled at unexpected tim-
ing.
when fcgck is fc/4 (CGCR<FCGCKSEL>=00). Otherwise, IRSTSR<FCLR> may be enabled at unexpected timing.
nals. The value written in SYSCR3 is reset by a power-on reset and other reset signals.
Read/Write
Read/Write
Read/Write
Bit Symbol
Bit Symbol
Bit Symbol
After reset
After reset
After reset
RSTDISS
SYSCR4
FCLR
W
Writes the SYSCR3 data control code.
R
External reset input enable status
7
0
7
0
7
0
-
FLSRF
R
R
6
0
6
0
6
0
-
TRMDS
R
R
5
0
5
0
5
0
-
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TRMRF
R
R
4
0
4
0
4
0
-
0xB2 : Enables the contents of SYSCR3<RSTDIS>.
0xD4 : Enables the contents of SYSCR3<RAREA> and SYSCR3
<RVCTR>.
0x71 : Enables the contents of IRSTSR<FCLR>
Others : Invalid
0 : The enabled SYSCR3<RSTDIS> data is "0".
1 : The enabled SYSCR3<RSTDIS> data is "1".
SYSCR4
W
LVD2RF
R
R
3
0
3
0
3
0
-
(RVCTRS)
LVD1RF
R
R
2
0
2
0
2
0
(RAREAS)
SYSRF
1
0
1
R
0
1
R
0
TMP89FM42
RSTDISS
WDTRF
R
R
0
0
0
0
0
0