tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 284

• Manufacturer Part Number: tmp89fm42
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

18.4 Functions
18. Serial Bus Interface (SBI)
RA001
18.4.4 Serial clock
18.4.4.1 Clock source
Table 18-2 States of the SCL0 and SDA0 Pins in the Acknowledgment Mode
Master
Mode
Slave
mode.
Note: In the non-acknowledgment mode, the clocks for an acknowledge signal are not generated or counted,
SBI0CR1<SCK> is used to set the HIGH and LOW periods of the serial clock to be output in the master
and thus no acknowledge signal is output.
received in the transmitter mode, the SDA0 pin is released to receive an acknowledge signal
from the receiver during the period of the clocks for an acknowledge signal.
nal is generated. Table 18-2 shows the states of the SCL0 and SDA0 pins in the acknowledg-
ment mode.
SDA0
SDA0
SCL0
SCL0
Pin
During the data transfer after the slave address match is detected or a "GENERAL CALL" is
In the receiver mode, the SDA0 pin is pulled down to the low level and an acknowledge sig-
When the slave address
match is detected or a
"GENERAL CALL" is
received
During transfer after the
slave address match is
detected or a "GEN-
ERAL CALL" is received
SCK
000:
001:
010:
011:
100:
101:
110:
111:
Condition
-
-
-
t
HIGH
Page 270
(m/fcgck)
135
263
11
15
23
39
71
m
9
Add the clocks for an
acknowledge signal.
Release the pin to receive an
acknowledge signal
Count the clocks for an
acknowledge signal
Release the pin to receive an
acknowledge signal
Transmitter
-
t
LOW
(n/fcgck)
138
266
12
14
18
26
42
74
n
Add the clocks for an acknowl-
edge signal
Output the low level as an
acknowledge signal to the pin
Count the clocks for an
acknowledge signal
Output the low level as an
acknowledge signal to the pin
Output the low level as an
acknowledge signal to the pin
Receiver
TMP89FM42